ENICSF2811PBKA datasheet(74/172 Pages) TI1

74 / 172 page

McBSP Receive

Interrupt Select Logic

Expand Logic

RX FIFO

Interrupt

DRR2 Receive Buffer

RX FIFO Registers

RBR1 Register

RBR2 Register

McBSP Registers

and

Control Logic

CLKX

FSX

CLKR

FSR

Compand Logic

DXR2 Transmit Buffer

RSR1

XSR2

XSR1

Peripheral Read Bus

RSR2

DXR1 Transmit Buffer

LSPCLK

MRINT

To CPU

McBSP

RX Interrupt Logic

RX FIFO _15

RX FIFO _1

RX FIFO _0

RX FIFO _15

RX FIFO _1

RX FIFO _0

McBSP Transmit

Interrupt Select Logic

TX FIFO

Interrupt

TX FIFO Registers

MXINT

To CPU

TX Interrupt Logic

TX FIFO _15

TX FIFO _1

TX FIFO _0

TX FIFO _15

TX FIFO _1

TX FIFO _0

Peripheral Write Bus

DRR1 Receive Buffer

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T – APRIL 2001 – REVISED MAY 2012

www.ti.com

Figure 4-9 shows the block diagram of the McBSP module with FIFO, interfaced to the F281x and C281x

version of Peripheral Frame 2.

Figure 4-9. McBSP Module With FIFO

Peripherals

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Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812

ENICSF2811PBKA Datasheet(PDF) 74 Page - Texas Instruments

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