DocID025003 Rev 1

17/29

A6727

Application details

Figure 8. PWM control loop

Compensation goal is to close the control loop assuring high DC regulation accuracy, good

dynamic performances and stability. To achieve this, the overall loop needs high DC gain,

high bandwidth and good phase margin.

dB axis with -20 dB/decade slope.

Figure 9 shows an asymptotic bode plot of a type III compensation.

L

R

C

OUT

ESR

R

F

C

F

C

P

R

FB

C

S

OSC

V

IN

∆V

OSC

+

+

_

_

V

OUT

V

REF

Z

F

Z

FB

PWM

COMPARATOR

ERROR

AMPLIFIER

R

S

AM16772v1