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L6751C Datasheet(PDF) 31 Page - STMicroelectronics

No. de pieza L6751C
Descripción Electrónicos  Digitally controlled dual PWM for Intel VR12 and AMD SVI
PDF  57 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6751C Datasheet(HTML) 31 Page - STMicroelectronics

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L6751C
Output voltage positioning
57
dence of the output voltage on the load current, a static error, proportional to the output
current, causes the output voltage to vary according to the sensed current.
Figure 7 shows the current sense circuit used to implement the load-line. The current
flowing across the inductor DCR is read through RSG. RSG programs a trans-conductance
gain and generates a current ISDROOP proportional to the current delivered by the single-
phase section that is then sourced from the SFB pin with proper gain eventually adjusted by
the PMBus commands. RSFB gives the final gain to program the desired load-line slope
(Figure 6).
The output characteristic vs. load current is then given by:
Equation 7
where RSLL is the resulting load-line resistance implemented by the single-phase section.
The RSFB resistor can then be designed according to the RSLL as follows:
Equation 8
6.7
Dynamic VID transition support
The L6751C manages dynamic VID transitions that allow the output voltage of both sections
to be modified during normal device operation for power management purposes. OV, UV
and OC signals are masked during every DVID transition and they are re-activated with
proper delay to prevent from false triggering.
When changing dynamically the regulated voltage (DVID), the system needs to charge or
discharge the output capacitor accordingly. This means that an extra-current IDVID needs to
be delivered (especially when increasing the output regulated voltage) and it must be
considered when setting the overcurrent threshold of both sections. This current results:
Equation 9
where dVOUT / dTVID depends on the specific command issued (20 mV/sec for SetVID_-
Fast and 5 mV/
sec for SetVID_Slow). Overcoming the total OC threshold during the
dynamic VID causes the device to latch and disable. Set proper filtering on ILIM to prevent
from false total-OC tripping.
As soon as the controller receives a new valid command to set the VID level for one (or
both) of the two sections, the reference of the involved section steps up or down according
to the target-VID with the programmed slope until the new code is reached. If a new valid
command is issued during the transition, the device updates the target-VID level and
performs the dynamic transition up to the new code. OV, UV are masked during the
VSOUT=VID RSFB ISDROOP
VID RSFB
DCR
RSG
------------- ISOUT

VID RSLL ISOUT
=
RSFB
RSLL
RSG
DCR
-------------
=
IDVID
COUT
dVOUT
dTVID
------------------
=



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