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AS4C16M16S Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation |
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AS4C16M16S Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation |
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1 / 54 page ![]() AS4C16M16S Confidential 1 Rev 3 Feb. 2014 16M x 16 bit Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.4, Feb. /2012) Features Fast access time from clock: 5.4/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture 4M word x 16-bit x 4-bank Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function Auto Refresh and Self Refresh 8192 refresh cycles/64ms CKE power down mode Single +3.3V power supply Interface: LVTTL Operating temperature range - Commercial (0 ~ 70°C) - Industrial (-40 ~ 85°C) - Automotive (-40 ~ 105°C) 54-pin 400 mil plastic TSOP II package 54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package All parts fully ROHS Compliant Overview T he 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The SDRAM provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications. Table 1. Key Specifications AS4C16M16S -6/7 tCK3 Clock Cycle time (min.) 6/7 ns tAC3 Access time from CLK (max.) 5.4/5.4 ns tRAS Row Active time (min.) 42/49 ns tRC Row Cycle time (min.) 60/63 ns Table 2. Ordering Information Part Number Frequency Package AS4C16M16S-7TCN 143 MHz 54 pin TSOP II AS4C16M16S-6TCN 166 MHz 54 pin TSOP II AS4C16M16S-6TIN 166 MHz 54 pin TSOP II AS4C16M16S-6BIN 166 MHz 54 ball TFBGA AS4C16M16S-7BCN 143 MHz 54 ball TFBGA AS4C16M16S-6TAN 166 MHz 54 pin TSOP II T : indicates TSOP II package B : indicates TFBGA package N : indicates Pb free and Halogen free – ROHS compliant parts C: Commercial I: Industrial A: Automotive temperatures |
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