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STOD03ASTPUR Datasheet(PDF) 16 Page - STMicroelectronics |
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STOD03ASTPUR Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 25 page ![]() Application information STOD03AS 16/25 DocID022614 Rev 2 7.2 Recommended PCB layout The STOD03AS is high frequency power switching device and therefore requires a proper PCB layout in order to obtain the necessary stability and optimize line/load regulation and output voltage ripple. Analog input (VINA) and power input (VINP) must be kept separated and connected together at the CIN pad only. The input capacitor must be as close as possible to the IC. In order to minimize the ground noise, a common ground node for power ground and a different one for analog ground must be used. In the recommended layout, the AGND node is placed close to CREF ground while the PGND node is centered at CIN ground. They are connected by a separated layer routing on the bottom through vias. The exposed pad is connected to AGND through vias. Figure 14. Top layer and silk-screen (top view, not to scale) |
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