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WM8918 Datasheet(PDF) 21 Page - Cirrus Logic |
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WM8918 Datasheet(HTML) 21 Page - Cirrus Logic |
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21 / 176 page  Production Data WM8918 w PD, Rev 4.1, January 2012 21 TDM MODE In TDM mode, it is important that two devices do not attempt to drive the AIFTXDAT pin simultaneously. The timing of the WM8918 AIFTXDAT tri-stating at the start and end of the data transmission is described below. BCLK AIFTXDAT AIFTXDAT set-up time AIFTXDAT release time AIFTXDAT undriven (tri-state) AIFTXDAT valid (DMIC output) AIFTXDAT valid AIFTXDAT undriven (tri-state) Figure 4 Audio Interface Timing - TDM Mode Test Conditions AVDD = CPVDD = 1.8V , DGND=AGND=CPGND= =0V, TA = +25 oC, Master Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless otherwise stated. PARAMETER CONDITIONS MIN TYP MAX UNIT Audio Data Timing Information AIFTXDAT setup time from BCLK falling edge DCVDD =2.0V DBVDD = 3.6V 5 ns DCVDD = 1.08V DBVDD = 1.62V 15 ns AIFTXDAT release time from BCLK falling edge DCVDD = 2.0V DBVDD = 3.6V 5 ns DCVDD = 1.08V DBVDD = 1.62V 15 ns |
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