TH8055 datasheet(3/15 Pages) MICRO-ELECTRONICS

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TH8055

Single Wire CAN Transceiver

390108055

Page 3 of 15

Rev. 1.1a

Jan 2002

Functional Description

TxD Input Pin - Logic command to transmit on the single wire CAN bus as follows:

TxD Polarity

TxD = logic 1 (or floating) on this pin produce an

undriven or recessive bus state (low bus

voltage)

TxD = logic 0 on this pin produce either a bus

normal or a bus high voltage dominant state

depending on the transceiver mode state (high

bus voltage)

If the TxD pin is driven to a logic low state while the

sleep mode (Mode0=0 and Mode1=0) is activated,

the transceiver

not drive the CANH pin to the

dominant state.

The transceiver provides an internal pull up current

on the TxD pin which will cause the transmitter to

default to the bus recessive state when TxD is not

driven.

TxD input signals are standard CMOS logic levels.

Timeout Feature

In case of a faulty blocked dominant TxD input

signal the CANH output is switched off automatically

after the specified TxD timeout reaction time to

prevent a dominant bus.

The transmission is continued by next TxD L to H

transition without delay.

Mode 0 and Mode 1 pins - are used to select transceiver operating modes:

The transceiver provides a weak internal pull down

current on each of these pins which causes the

transceiver to default to sleep mode when they are

not driven. The mode input signals are standard

CMOS logic level.

Mode

Sleep mode

High speed mode

Wake up

Normal mode

Sleep Mode

Transceiver is in low power state, waiting for wake

up via high voltage signal or by mode pins change to

any state other than 0,0. In this state, the CANH pin

is not in the dominant state regardless of the state of

the TxD pin.

High Speed Mode

This mode allows high speed download with bitrates

up to 100Kbit/s. The output waveshaping circuit is

disabled in this mode. Bus transmitter drive circuits

for those nodes which are required to communicate

in high speed mode are able to drive reduced bus

resistance

this

mode

(see

Table

Static

Characteristics). High speed communications shall

utilize the normal mode signal voltage levels as

specified in Static Characteristics.

Wake Up Mode

This bus includes a selective node awake capability,

which allows normal communication to take place

among some nodes while leaving the other nodes in

an undisturbed sleep state. This is accomplished by

controlling the signal voltages such that all nodes

must wake up when they receive a higher voltage

message

signal waveform. The communication

system communicates to the nodes information as to

which nodes are to stay operational (awake) and

which nodes are to put themselves into a non

communicating

low

power

“sleep”

state.

Communication at the lower, normal voltage levels

shall not disturb the sleeping nodes.

Normal mode

Transmission bit rate in normal communication is 33

Kbits/s. In normal transmission mode the TH8055

supports controlled waveform rise and overshoot

times. Waveform trailing edge control is required to

assure

that

high

frequency

components

are

minimized at the beginning of the downward voltage

slope. The remaining fall time occurs after the bus

is inactive with drivers off and is determined by the

RC time constant of the total bus load.

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