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AD650JP Datasheet(PDF) 18 Page - Analog Devices |
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AD650JP Datasheet(HTML) 18 Page - Analog Devices |
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18 / 21 page ![]() Data Sheet AD650 Rev. E | Page 17 of 20 PHASE-LOCKED LOOP F/V CONVERSION Although the F/V conversion technique shown in Figure 13 is quite accurate and uses only a few extra components, it is very limited in terms of signal frequency response and carrier feed- through. If the carrier (or input) frequency changes instantaneously, then the output cannot change very rapidly due to the integrator time constant formed by CINT and RIN. While it is possible to decrease the integrator time constant to provide faster settling of the F-to-V output voltage, the carrier feedthrough then becomes larger. For signal frequency response in excess of 2 kHz, a phase-locked F/V conversion technique such as the one shown in Figure 22 is recommended. In a phase-locked loop circuit, the oscillator is driven to a frequency and phase equal to an input reference signal. In applications such as a synthesizer, the oscillator output frequency is first processed through a programmable “divide by N” before being applied to the phase detector as feedback. Here the oscillator frequency is forced to be equal to “N times” the reference frequency. It is this frequency output that is the desired output signal and not a voltage. In this case, the AD650 offers compact size and wide dynamic range. 14 13 1 8 6 5 4 2 3 7 9 10 1 2 5 4 3 6 +VS –VS +VS AD582 –VS 1000pF CAP 0.1µF 200kΩ 10kΩ OUTPUT 1kΩ 1 2 3 4 14 13 12 11 5 10 6 9 7 8 AD7512 –VS +VS CONTROL INPUT +5V INPUT VOLTAGE 16.9kΩ 0.5mA BIPOLAR OFFSET 1mA –VS +IN –IN +VS COS NULL AD650 COMPARATOR INPUT COMPARATOR FREQUENCY OUTPUT DIGITAL GND ANALOG GND FREQUENCY OUTPUT ONE SHOT OP AMP –0.6 VOLT 500Ω 10µF 0.1µF 51pF 0.1µF + 10 –15V +15V GND 1000pF 9 3.6kΩ –5 VOLTS VFC NORMAL GND AUTO ZERO 11 12 8 Figure 21. Autozero Circuit C 51pF 15pF R 140kΩ 71.5kΩ 590kΩ –15V 10 12 4 1 2 11 3 13 9 5 AD650 1MHz FULL-SCALE RIN = 16.9k COS = 51pF CINT = 1000pF (UNIPOLAR INPUT) FREQ OUT INPUT CARRIER VOLTS INPUT TO AD650 NAND XOR 1 2 5 4 36 G D B S 1/2 7474 1/2 7474 D1 PR1 D2 PR2 Q1 Q2 CLEAR1 SD211 DMOSFET D TYPE FLIP FLOP 1 1 F/V VOLTAGE OUTPUT INPUT CARRIER CLOCK1 CLOCK2 CLEAR2 AD509 OP AMP 1/4 7400 7486 Figure 22. Phase-Locked Loop F/V Conversion |
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