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AD7321 Datasheet(PDF) 31 Page - Analog Devices |
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AD7321 Datasheet(HTML) 31 Page - Analog Devices |
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31 / 37 page ![]() AD7321 Data Sheet Rev. B | Page 30 of 36 POWER VS. THROUGHPUT RATE The power consumption of the AD7321 varies with throughput rate. The static power consumed by the AD7321 is very low, and significant power savings is achieved as the throughput rate is reduced. Figure 48 and Figure 49 shows the power vs. throughput rate for the AD7321 at a VCC of 3 V and 5 V, respectively. Both plots clearly show that the average power consumed by the AD7321 is greatly reduced as the sample frequency is reduced. This is true whether a fixed SCLK value is used or if it is scaled with the sampling frequency. Figure 48 and Figure 49 show the power consumption when operating in normal mode for a variable SCLK that scales with the sampling frequency. 12 0 0 THROUGHPUT RATE (kSPS) 10 8 6 4 2 100 200 300 400 500 VARIABLE SCLK VCC = 3V VDD/VSS = ±12V TA = 25°C INTERNAL REFERENCE Figure 48. Power vs. Throughput Rate with 3 V VCC 20 0 0 THROUGHPUT RATE (kSPS) 18 16 14 12 10 8 6 4 2 100 200 300 400 500 VARIABLE SCLK VCC = 5V VDD/VSS = ±12V TA = 25°C INTERNAL REFERENCE Figure 49. Power vs. Throughput Rate with 5 V VCC |
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