Description
The TC55B8128P/J is a 1,048,576 bit high speed BICMOS static random access memory organized as 131,072 words by 8 bits
and operated from a single 5V supply. Toshiba's BICMOS technology and advanced circuit design enable high speed operation.
The TC5588128P/J features low power dissipation when the device is deselected using chip enable (CE), and has an output
enable input (OE) for fast memory access.
The TC5588128P/J is suitable for use in high speed applications such as cache memory and high speed storage. All inputs and
outputs are TTL compatible.
The TC55B8128P/J is available in a 400mil width, 32-pin DIP and SOJ suitable for high density surface assembly.

Features
Fast access time
- TC55B8128P/J-12
- TC55B8128P/J-15
- TC55B8128P/J-20
• Low power dissipation
Operation:
- TC55B8128P/J-12
- TC55B8128P/J-15
- TC55B8128P/J-20
- Standby:
• Single 5V power supply: 5V±10%
Fully static operation
Inputs and outputs TTL compatible
12ns (max.)
15ns (max.)
20ns (max.)
150mA (max.)
150mA (max.)
150mA (max.)
15mA (max.)
• Output buffer control: OE
• Package:
- TC55B8128P: DIP32-P-400
- TC55B8128J: SOJ32-P-400A