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5220-DS02-R Datasheet(PDF) 50 Page - Broadcom Corporation. |
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5220-DS02-R Datasheet(HTML) 50 Page - Broadcom Corporation. |
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50 / 90 page ![]() BCM5220 Preliminary Data Sheet 04/20/04 Broa d c om Co rp o r a t i o n Page 38 Auto-Negotiation Link Partner (LP) Next Page Transmit Register Document 5220-DS04-405-R Bypass NRZI Encoder/Decoder The NRZI encoder and decoder can be bypassed by writing a 1 to bit 8 of MII register 10h, causing 3-level NRZ data to be transmitted and received on the cable. Normal operation (3-level NRZI encoding and decoding) can be re-enabled by writing a 0 to this bit. Bypass Receive Symbol Alignment Receive symbol alignment can be bypassed by writing a 1 to bit 7 of MII register 10h. When used in conjunction with the bypass 4B5B encoder/decoder bit, unaligned 5B codes are placed directly on the RXER and RXD1, RXD0 pins. Baseline Wander Correction Disable The baseline wander correction circuit can be disabled by writing a 1 to bit 6 of MII register 10h. The BCM5220 corrects for baseline wander on the receive data signal when this bit is cleared. FEF Enable Controls the far end fault mechanism associated with 100BASE-FX operation. A 1 enables the FEF function and a 0 disables it. Reserved Bits The reserved bits of the 100BASE-X Auxiliary Control register must be written as 0 at all times. Ignore the BCM5220 outputs when these bits are read. |
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