DAC5686IPZP datasheet(26/46 Pages) TI

No. de pieza	DAC5686IPZP

Descripción Electrónicos	16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER

PDF	46 Pages

Scroll/Zoom	100%

Fabricante Electrónico	TI [Texas Instruments]

Página de inicio	http://www.ti.com

Logo

26 / 46 page

www.ti.com

Dual-Bus Mode

IOUTB1

IOUTB2

IOUTA1

IOUTA2

16-Bit

DAC

DA[15:0]

DB[15:0]

2Fdata

2 – 16 y Fdata

Fdata

16-Bit

DAC

2Fdata

FIR1

Edge Triggered

Input Latches

• ••

DEMUX

CLK1

DA[15:0]

DB[15:0]

ts(DATA)

th(DATA)

AN+1

BN+1

CLK2

DA[15:0]

DB[15:0]

ts(DATA)

th(DATA)

AN+1

BN+1

PLLLOCK

td(PLLLOCK)

DAC5686

SLWS147B – APRIL 2003 – REVISED AUGUST 2004

In dual-bus mode, two separate parallel data streams (I and Q) are input to the DAC5686 on data bus DA and

data bus DB. Dual-bus mode is selected by setting INTERL to 0 in the config_msb register. Figure 28 shows

the DAC5686 data path in dual-bus mode. The dual-bus mode timing diagram is shown in Figure 29 for the PLL

clock mode and in Figure 30 for the external clock mode.

Figure 28. Dual-Bus Mode Data Path

Figure 29. Dual-Bus Mode Timing Diagram (PLL Mode)

Figure 30. Dual-Bus Mode Timing Diagram (External Clock Mode)

DAC5686IPZP Datasheet(PDF) 26 Page - Texas Instruments

DAC5686IPZP Datasheet(HTML) 26 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Descarga

Enlace URL