AM652X datasheet(196/299 Pages) TI1

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AM6548, AM6528, AM6546

AM6526, AM6527

SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018

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Specifications

Table 5-62. Timing Requirements for SPI - Master Mode (1) (8)

NO.

PARAMETER

DESCRIPTION

MODE

MIN

MAX

UNIT

SM1

tc(SPICLK)

Cycle time, SPI_CLK (1) (2)

20.8(3)

SM2

tw(SPICLKL)

Typical Pulse duration, SPI_CLK low (1)

-1 +

0.5P (4)

SM3

tw(SPICLKH)

Typical Pulse duration, SPI_CLK high (1)

-1 +

0.5P (4)

SM4

tsu(MISO-SPICLK)

Setup time, SPI_D[x] valid before SPI_CLK active edge

(1)

SM5

th(SPICLK-MISO)

Hold time, SPI_D[x] valid after SPI_CLK active edge (1)

SM6

td(SPICLK-SIMO)

Delay time, SPI_CLK active edge to SPI_D[x] transition

(1)

-3

SM7

tsk(CS-SIMO)

Delay time, SPI_CS[x] active to SPI_D[x] transition

SM8

td(SPICLK-CS)

Delay time, SPI_CS[x] active to SPI_CLK first edge

Master_PHA0_POL0;

Master_PHA0_POL1;(

-4 + B (6)

Master_PHA1_POL0;

Master_PHA1_POL1;(

-4 + A (7)

SM9

td(SPICLK-CS)

Delay time, SPI_CLK last edge to SPI_CS[x] inactive

Master_PHA0_POL0;

Master_PHA0_POL1;(

-4 + A (7)

Master_PHA1_POL0;

Master_PHA1_POL1;

(5)

-4 + B (6)

(1) This timing applies to all configurations regardless of SPI_CLK polarity and which clock edges are being used to drive output data and

capture input data

(2) Related to the SPI_CLK maximum frequency

(3) 20 ns cycle time = 50 MHz

(4) P = SPICLK period

(5) SPI_CLK phase is programmable with the PHA bit of the SPI_CH(i)CONF register

(6) B = (TCS + .5) * TSPICLKREF, where TCS is a bit field of the SPI_CH(i)CONF register and Fratio = Even >= 2.

(7) When P = 20.8 ns, A = (TCS + 1) * TSPICLKREF, where TCS is a bit field of the SPI_CH(i)CONF register.

When P > 20.8 ns, A = (TCS + 0.5) * Fratio * TSPICLKREF, where TCS is a bit field of the SPI_CH(i)CONF register.

(8) The IO timings provided in this section are applicable for all combinations of signals for SPI1 and SPI2. However, the timings are only

valid for SPI3 and SPI4 if signals within a single IOSET are used. The IOSETs are defined in the following tables.

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