EMDA0P10F datasheet(1/5 Pages) EXCELLIANCE

No. de pieza	EMDA0P10F

Descripción Electrónicos	P?륝hannel Logic Level Enhancement Mode Field Effect Transistor

PDF	5 Pages

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Fabricante Electrónico	EXCELLIANCE [Excelliance MOS Corp.]

Página de inicio	http://www.excelliancemos.com/

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2013/12/20

p.1

EMDA0P10F

G

S

D

P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BVDSS ‐100V

RDSON (MAX.)

120mΩ

ID ‐22A

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

UNIT

Gate‐Source Voltage

VGS

±20

V

Continuous Drain Current

TC = 25 °C

ID

‐22

A

TC = 100 °C ‐15

Pulsed Drain Current

1

IDM ‐75

Avalanche Current

IAS ‐15

Avalanche Energy

L = 0.1mH, ID=‐15A, RG=25Ω

EAS

22.5

mJ

Repetitive Avalanche Energy

2

L = 0.05mH

EAR

11.25

Power Dissipation

TC = 25 °C

PD

38

W

TC = 100 °C

15

Operating Junction & Storage Temperature Range

Tj, Tstg ‐55 to 150

°C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

RJC

3.3

°C / W

Junction‐to‐Ambient

RJA

62.5

1Pulse width limited by maximum junction temperature.

2Duty cycle  1％

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EMDA0P10F Datasheet(PDF) 1 Page - Excelliance MOS Corp.

EMDA0P10F Datasheet(HTML) 1 Page - Excelliance MOS Corp.

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