WM8742GEDSSLASHV datasheet(21/66 Pages) CIRRUS

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WM8742

Rev 4.4

2-WIRE SERIAL CONTROL MODE

The WM8742 supports software control via a 2-wire serial bus. Many devices can be controlled by the

same bus, and each device has a unique 7-bit address (this is not the same as the 7-bit address of

each register in the WM8742).

The WM8742 operates as a slave device on the 2-wire control bus. The controller indicates the start

of data transfer with a high to low transition on SDIN while SCLK remains high. This indicates that a

device address and data will follow. All devices on the 2-wire bus respond to the start condition and

shift in the next eight bits on SDIN (7-bit address + Read/Write bit, MSB first). If the device address

received matches the address of the WM8742

and the R/W bit is ‘0’, indicating a write, then the

WM8742 responds by pulling SDIN low on the next clock pulse (ACK).

If the address is not

ecognised or the R/W bit is ‘1’, the WM8742 returns to the idle condition and wait for a new start

condition and valid address.

Once the WM8742 has acknowledged a correct address, the controller sends the first byte of control

data (B15 to B8, i.e. the WM8742 register address plus the first bit of register data). The WM8742

then acknowledges the first data byte by pulling SDIN low for one clock pulse. The controller then

sends the second byte of control data (B7 to B0, i.e. the remaining 8 bits of register data), and the

WM8742 acknowledges again by pulling SDIN low.

The transfer of data is complete when there is a low to high transition on SDIN while SCLK is high.

After receiving a complete address and data sequence the WM8742 returns to the idle state and waits

for another start condition. If a start or stop condition is detected out of sequence at any point during

data transfer (i.e. SDIN changes while SCLK is high), the device reverts to the idle condition.

SDI

SCLK

1st register data bit

DEVICE ADDRESS

(7 BITS)

RD / WR

BIT

ACK

(LOW)

CONTROL BYTE 1

(BITS 15 TO 8)

CONTROL BYTE 2

(BITS 7 TO 0)

remaining 8 bits of

STOP

START

ACK

(LOW)

ACK

(LOW)

Figure 13 2-wire Serial Control Interface

The WM8742 device address can be configured between two options. This is selected by the SADDR

pin.

NAME

DESCRIPTION

CSB/

SADDR/I2S

0 = 2-wire address 0011010

1 = 2-wire address 0011011

Table 10 2-wire Serial Control Mode Address Selection

DIGITAL AUDIO INTERFACE

PCM MODE

There are a number of valid PCM data input modes. Two channel and one channel differential mono

modes can be selected by serial or hardware control. It is also possible to bypass the WM8742 digital

filters and apply a signal at a rate 8fs (where fs is the sampling rate) directly to the switched capacitor

stage.

WM8742GEDS/V Datasheet(PDF) 21 Page - Cirrus Logic

WM8742GEDS/V Datasheet(HTML) 21 Page - Cirrus Logic

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