AD9546SLASHPCBZ datasheet(164/205 Pages) AD

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AD9546

Data Sheet

Rev. 0 | Page 164 of 205

Next, convert −15.5° to fractional UI.

Fractional UI = −15.5°/360°

= −0.0430555556 (to 10 decimal places)

Because Bits[39:0], the phase offset bits, constitute a signed, twos

complement 40-bit number spanning 1 UI, calculate the value

of Bits[39:0] as follows:

Bits[39:0] = −0.0430555556 × 240

= −47,340,083,974 (nearest integer)

= 0x F4 FA4F A4FA (40-bit hexadecimal)

AUXILIARY NCO PHASE SLEW LIMIT

When the user requests the application of a phase offset on one

of the auxiliary NCOs, the AD9546 does not necessarily apply

the full phase offset all at once. Instead, Bits[31:0] (unsigned) of

control whether the phase offset is immediate or slew limited.

When the phase slew limit bits, Bits[31:0], have a decimal value

of zero, phase offset is immediate. That is, the auxiliary NCO

applies the specified phase offset value all at once. However,

when Bits[31:0] are nonzero, phase offset is slew limited. That

is, the auxiliary NCO gradually introduces phase changes by

regulating the rate at which the phase changes occur to prevent

exceeding the limit imposed by the value of Bits[31:0]. The

auxiliary NCO keeps track of the total phase change and

terminates the phase slew limiting process when the total phase

change satisfies the value established by the auxiliary NCO

phase offset parameters (see the Auxiliary NCO Phase Offset

section).

Bits[31:0] carry units of 2−36 UI/UI, where UI is the unit interval

of the associated auxiliary NCO (1 UI is the reciprocal of the

programmed frequency of the auxiliary NCO). That is, the user

specifies the maximum rate of change of phase as fractions of a

cycle per cycle. Note the user must program Bits[31:0] prior to

invoking a phase offset.

For example, assume the programmed frequency of the

auxiliary NCO is 60 Hz (therefore, 1 UI = 1/60 sec) and the

desired limit for the rate of change of phase is 1 μs/sec

(10−6 sec/sec). Note that sec/sec and UI/UI are fundamentally

equivalent. Therefore, 10−6 sec/sec is 10−6 UI/UI. Because

Bits[31:0] are in units of 2−36 UI/UI, the required value for

Bits[31:0] is 10−6/2−36 = 68,719 (rounded to the nearest integer)

or 0x 0001 0C6F hexadecimal. Assuming the user programs

Bits[31:0] to 68,719 (decimal), when the user invokes the phase

offset specified by the auxiliary NCO phase offset parameters

(see the Auxiliary NCO Phase Offset section), the AD9546

automatically ensures that the rate of change of phase does not

exceed the specified value of 1 μs per second.

When Bits[31:0] are nonzero and while the auxiliary NCO is in

the process of limiting the phase slew rate, the device sets a

status bit in Register 0x3002: Bit 4 for auxiliary NCO 0 or Bit 6

for auxiliary NCO 1.

ELAPSED TIME ADJUSTMENT

As shown in Figure 111, the user can read the auxiliary NCO

time scale via Bits[79:0] of Register 0x3A00 to Register 0x3A09

(for auxiliary NCO 0) and Register 0x3A0A to Register 0x3A13

(for auxiliary NCO 1). The format of the time scale is a 40-bit

integer part (most significant bits) and a 40-bit fractional part

(least significant bits). The integer part keeps track of elapsed

periods of the auxiliary NCO. The fractional part effectively

represents the phase of the accumulator within the current

cycle period.

The contents of the time scale registers indicate the elapsed

time up to the moment of the most recent IO update.

The user has the option of adjusting the 40-bit integer portion

of the time scale register based on Bits[39:0] of Register 0x2819

to Register 0x281D (for auxiliary NCO 0) and Register 0x2859

to Register 0x285D (for auxiliary NCO 1). The specific

functionality of the adjustment depends on the value of Bit 1 of

auxiliary NCO 1), as explained in the Direct Elapsed Time

Adjustment section and the Incremental Elapsed Time

Adjustment section.

An application benefiting from elapsed time adjustment is time

of day indication, where the user adjusts the integer part of the

time scale register to match UTC time. Such an application

assumes programming the auxiliary NCO to 1 Hz, which

equates to a period of 1 sec.

Direct Elapsed Time Adjustment

Direct elapsed time adjustment is in effect when Bit 1 = 0 of

auxiliary NCO 1). For direct elapsed time adjustments, Bits[39:0]

constitute an unsigned integer that directly replaces the

corresponding 40-bit integer portion of the auxiliary NCO time

scale register.

Incremental Elapsed Time Adjustment

Incremental elapsed time adjustment is in effect when Bit 1 = 1

of Register 0x280F (for auxiliary NCO 0) and Register 0x284F

(for auxiliary NCO 1). For incremental elapsed time adjustments,

the elapsed time adjustment bits (Bits[39:0] in Register 0x281D to

complement integer that increments or decrements the 40-bit

integer portion of the auxiliary NCO time scale register relative

to its current value.

AUXILIARY NCO TIME STAMPS

The auxiliary NCO generates internal time stamps marking the

rollover of its phase accumulator. Because the accumulator

updates with a quantized period of 1/fACCUM, the accumulator

rarely rolls over to exactly zero (that is, most of the time, the

accumulator rolls over with a remainder). Therefore, the

auxiliary NCO performs the appropriate interpolation to

AD9546/PCBZ Datasheet(PDF) 164 Page - Analog Devices

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