AD9546SLASHPCBZ datasheet(166/205 Pages) AD

166 / 205 page

AD9546

Data Sheet

Rev. 0 | Page 166 of 205

CLOCK

SOURCE

Mx PIN

SWITCH

MATRIX

CSB/M6

PINS

PULSE

TO DIGITAL

CROSS POINT

MUX

TIME

STAMPS

TIME

STAMPS

AUX NCO 0

TIME SCALE

TO UTSP 0

AND UTSP 1

CENTER

OFFSET

CENTER

OFFSET

FREQ

PHASE

PHASE SLEW

PHASE TYPE

STATUS

AUXILIARY

NCO 0

TIME ADJUST

TIME ADJUST TYPE

PULSE SIGNIFICAND

PULSE EXPONENT

FREQ

PHASE

STATUS

DERIVED FROM

SYSTEM CLOCK

AUXILIARY

NCO 1

PHASE SLEW

PHASE TYPE

TIME ADJUST

TIME ADJUST TYPE

PULSE SIGNIFICAND

PULSE EXPONENT

AUX NCO 1

TIME SCALE

TAG RATIO

TAG SHIFT

TAG RATIO

TAG SHIFT

NOTE

1. A RANGE OF BITS USES A COLON SEPARATOR

REG 0x2806 TO 0x2800,

BITS[55:0]

REG 0x280A TO 0x2807,

BITS[31:0]

REG 0x2818 TO 0x2814,

BITS[39:0]

REG 0x280F, BIT 0

REG 0x2813 TO 0x2810,

BITS[31:0]

REG 0x281D TO 0x2819,

BITS[39:0]

REG 0x280F, BIT 1

REG 0x281E, BITS[7:4]

REG 0x281E, BITS[3:0]

REG 0x280C TO 0x280B,

BITS[15:0]

REG 0x280E TO 0x280D,

BITS[15:0]

REG 0x2846 TO 0x2840,

BITS[55:0]

REG 0x284A TO 0x2847,

BITS[31:0]

REG 0x2858 TO 0x2854,

BITS[39:0]

REG 0x284F, BIT 0

REG 0x2853 TO 0x2850,

BITS[31:0]

REG 0x285D TO 0x2859,

BITS[39:0]

REG 0x284F, BIT 1

REG 0x285E, BITS[7:4]

REG 0x285E, BITS[3:0]

REG 0x284C TO 0x284B,

BITS[15:0]

REG 0x284E TO 0x284D,

BITS[15:0]

REG 0x3002, BIT 7

REG 0x3002, BIT 6

REG 0x3A13 TO 0x3A0A,

BITS[79:0]

REG 0x3A09 TO 0x3A00,

BITS[79:0]

REG 0x3002,

BIT 4

REG 0x3002,

BIT 5

Figure 111. Auxiliary NCO Block Diagram

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