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ADRF6614ACPZ-R7 Datasheet(PDF) 41 Page - Analog Devices

No. de pieza ADRF6614ACPZ-R7
Descripción Electrónicos  700 MHz to 3000 MHz, Dual Passive Receive Mixer with Integrated PLL and VCO
PDF  61 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADRF6614ACPZ-R7 Datasheet(HTML) 41 Page - Analog Devices

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Data Sheet
ADRF6614
Rev. 0 | Page 41 of 61
0
5
10
15
20
25
30
35
0
2
4
6
8
IFA_MAINBIAS
10
12
14
16
IFA_LINBIAS = 0
IFA_LINBIAS = 1
IFA_LINBIAS = 2
IFA_LINBIAS = 3
IFA_LINBIAS = 4
IFA_LINBIAS = 5
IFA_LINBIAS = 6
IFA_LINBIAS = 7
IFA_LINBIAS = 8
IFA_LINBIAS = 9
IFA_LINBIAS = 10
IFA_LINBIAS = 11
IFA_LINBIAS = 12
IFA_LINBIAS = 13
IFA_LINBIAS = 14
Figure 117. IIP3 vs. Main Bias (IFA_MAINBIAS) and Linearity Bias
(IFA_LINBIAS) Level at IF Frequency = 200 MHz
VGS PROGRAMMING
The ADRF6614 allows programmability for internal gate-to-
source voltages (VGS) for optimizing mixer performance over
the desired frequency bands. The ADRF6614 default VGS
setting is 0. Both channels of the ADRF6614 are programmed
together using the same VGS setting. Power conversion gain,
input IP3, input P1dB, and SSB noise figure can be optimized,
as shown in Figure 40, Figure 41, Figure 43, and Figure 44,
respectively.
LOW-PASS FILTER PROGRAMMING
The ADRF6614 allows programmability for the low-pass filter
terminating the mixer output. This filter blocks sum term mixing
products at the expense of some noise figure and gain and can
significantly increase input IP3. The ADRF6614 default LPF setting
is 0. Both channels of the ADRF6614 are programmed together
using the same LPF settings. Power conversion gain, input P1dB,
input IP3, and SSB noise figure can be optimized as shown in
Figure 42, Figure 45, Figure 46, and Figure 49, respectively.



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