HMC8193LC4TR-R5 datasheet(33/36 Pages) AD

33 / 36 page

Data Sheet

HMC8193

Rev. B | Page 33 of 36

APPLICATIONS INFORMATION

Figure 118 shows the typical application circuit for the

HMC8193. To select the appropriate sideband, an external 90°

hybrid is required. For applications not requiring operation to

dc, use an off-chip dc blocking capacitor. For applications that

require the LO signal at the output to be suppressed, use a bias

tee/RF choke as shown in Figure 118. Ensure that the source/

sink current used for LO suppression is less than 6 mA for each

IF port; otherwise, device damage may occur. The common-

mode voltage for each IF port is 0 V.

To select the upper sideband when using as an upconverter,

connect the IF1 pin to the 90° port of the hybrid, and connect

the IF2 pin to the 0° port of the hybrid. To select the lower

sideband, connect IF1 to the 0° port of the hybrid and IF2 to the

90° port of the hybrid. The input is from the sum port of the

hybrid and the difference port is 50 Ω terminated.

To select the upper sideband (low-side LO) when using as a

downconverter, connect the IF1 pin to the 0° port of the hybrid,

and connect the IF2 pin to the 90° port of the hybrid. To select

the lower sideband (high-side LO), connect the IF1 pin to the

90° port of the hybrid and IF2 to the 0° port of the hybrid. The

output is from the sum port of the hybrid, and the difference

port is 50 Ω terminated.

50Ω

HMC8193 EVALUATION BOARD

SUPPLY

FOR IF1

SUPPLY

FOR IF2

BIAS TEE/

DC FEED FOR IF2

BIAS TEE/

DC FEED FOR IF1

DC BLOCKING

CAPACITORS

EXTERNAL

90° HYBRID

NOTES

1. DASHED SECTIONS ARE OPTIONAL AND MEANT FOR LO NULLING.

Figure 118. Typical Application Circuit

HMC8193LC4TR-R5 Datasheet(PDF) 33 Page - Analog Devices

HMC8193LC4TR-R5 Datasheet(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Descarga

Enlace URL