HMC8193LC4TR-R5 datasheet(5/36 Pages) AD

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Data Sheet

HMC8193

Rev. B | Page 5 of 36

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NIC

GND

NIC

14 GND

15 LO

16 GND

17 NIC

18 NIC

HMC8193

TOP VIEW

(Not to Scale)

NOTES

1. NOT INTERNALLY CONNECTED. NO CONNECTION IS

REQUIRED. THESE PINS CAN BE CONNECTED TO

RF/DC GROUND WITHOUT AFFECTING PERFORMANCE.

2. EXPOSED PAD. THE EXPOSED PAD MUST BE

CONNECTED TO RF/DC GROUND.

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 6 to 8, 10, 13, 17 to 24

NIC

Not Internally Connected. No connection is required. These pins can be connected to RF/dc

ground without affecting performance.

3, 5, 12, 14, 16

GND

Ground Connect. These pins and package bottom must be connected to RF/dc ground. See Figure 3

for the interface schematic.

Radio Frequency. This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface

schematic.

IF1

First and Quadrature Intermediate Frequency. This pin is dc-coupled. For applications not

requiring operation to dc, dc block this port externally using a series capacitor with a value

selected to pass the necessary IF frequency range. For operation to dc, this pin must not source or

sink more than 6 mA of current; otherwise, the device does not function and may fail. See Figure 4

for the interface schematic.

IF2

Second Quadrature Intermediate Frequency. This pin is dc-coupled. For applications not

requiring operation to dc, dc block this port externally using a series capacitor with a value

selected to pass the necessary IF frequency range. For operation to dc, this pin must not source or

sink more than 6 mA of current; otherwise, the device does not function and may fail. See Figure 4 for

the interface schematic.

Local Oscillator. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the interface

schematic.

EPAD

Exposed Pad. The exposed pad must be connected to RF/dc ground.

INTERFACE SCHEMATICS

GND

Figure 3. GND Interface Schematic

IF1, IF2

Figure 4. IF1, IF2 Interface Schematic

Figure 5. RF Interface Schematic

Figure 6. LO Interface Schematic

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