ICS650-07B

Broadcom Clock Source

MD S 650-07B A

2

Revision 042600

Printed 11/15/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com

Pin Descriptions

Key: XI, XO = crystal connections; I = Input; O = Output; P = power supply connection

Pin Assignment

Number

Name

Type

Description

1

PS

I

PCI Clock frequency select input. Determines PCI CLK output per table above.

2

X2

XO

Crystal connection. Connect to 25 MHz crystal or leave unconnected for a clock input.

3

X1/ICLK

XI

Crystal connection. Connect to 25 MHz fundamental crystal or clock input.

4

VDD

P

Connect to +3.3 V or +5 V. Must be same as other VDDs.

5

DC

-

Don't Connect. Do not connect anything to this pin.

6

GND

P

Connect to ground.

7

125M

O

125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.

8

125M

O

125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.

9

DC

-

Don't Connect. Do not connect anything to this pin.

10

133M

O

133.33 MHz clock output.

11

GND

P

Connect to ground.

12

DC

-

Don't Connect. Do not connect anything to this pin.

13

DC

-

Don't Connect. Do not connect anything to this pin.

14

GND

P

Connect to ground.

15

OE

I

Output Enable. Tri-states all outputs when low. Internal pull-up.

16

VDD

P

Connect to +3.3 V or +5 V. Must be same as other VDDs.

17

PCICLK

O

PCI Clock output per table above.

18

25M

O

25.0 MHz buffered reference clock output.

19

VDD

P

Connect to +3.3 V or +5 V. Must be same as other VDDs.

20

VDD

P

Connect to +3.3 V or +5 V. Must be same as other VDDs.

1

16

2

3

4

15

14

13

VDD

DC

X2

VDD

20 pin (150 mil) SSOP

5

6

7

8

12

11

10

9

133M

VDD

X1/ICLK

PS

25M

VDD

PCICLK

DC

GND

125M

125M

18

17

19

20

GND

DC

DC

GND

OE

PS

PCICLK

Pin 1

Pin 17

0

33.33 MHz

1

66.66 MHz

PCI CLK Output Select Table

0 = connect directly to GND

1 = connect directly to VDD