AMD-761 datasheet(9/264 Pages) AMD

9 / 264 page

List of Tables

24081D—February 2002

AMD-761™ System Controller Software/BIOS Design Guide

Preliminary Information

List of Tables

Table 1.

AMD-761 System Controller Configuration Register

Bits Unknown at RESET# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2.

Recommended Settings for AMD Athlon Processor

SYSCFG Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 3.

AMD-761 System Controller Socket2000 Memory Map . . . . . 10

Table 4.

AMD Athlon Processor Special Cycle Encodings . . . . . . . . . . . 12

Table 5.

I/O Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 6.

Device 0, Function 0 Configuration Register Map . . . . . . . . . . 27

Table 7.

AMD-761 System Controller SERR# Assertion Control

and Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 8.

Wait State Settings for DRAM Timing Register . . . . . . . . . . . . 55

Table 9.

I/O Pad Drive Strength and Input Type . . . . . . . . . . . . . . . . . . . 90

Table 10.

DDR Memory Base Address Register Locations . . . . . . . . . . . . 95

Table 11.

AMD-761 DRAM Addressing Modes . . . . . . . . . . . . . . . . . . . . . 96

Table 12.

Device 0, Function 1 Configuration Register Map . . . . . . . . . . 97

Table 13.

PDL Calibration Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Table 14.

DDR PDL Configuration Register Locations. . . . . . . . . . . . . . 101

Table 15.

Device 1 Configuration Register Map . . . . . . . . . . . . . . . . . . . 117

Table 16.

AMD-761 System Controller Memory-Mapped Registers . . . 140

Table 17.

Typical CL Parameter Settings for PC1600 and PC2100 . . . . 151

Table 18.

DIMM Bank Address Bit Definition. . . . . . . . . . . . . . . . . . . . . 152

Table 19.

Memory Size Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

Table 20.

Total Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

Table 21.

AMD-761 System Controller DDR SDRAM

Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155

Table 22.

Memory Sizing Example, 128 Mbytes Total . . . . . . . . . . . . . . 156

Table 23.

Memory Sizing Example, 320 Mbytes Total . . . . . . . . . . . . . . 157

Table 24.

CAS Latency Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Table 25.

DDR Device Timing Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Table 26.

Dev 0:F0:0x54 Bit Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 161

Table 27.

System Related Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165

Table 28.

Refresh Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168

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