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ADP2165ACPZ-1.0-R7 Datasheet(PDF) 13 Page - Analog Devices

No. de pieza ADP2165ACPZ-1.0-R7
Descripción Electrónicos  5.5 V, 5 A/6 A, High Efficiency, Step-Down DC-to-DC Regulators with Output Tracking
PDF  23 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADP2165ACPZ-1.0-R7 Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
ADP2165/ADP2166
Rev. B | Page 13 of 23
SOFT START
The SS pin is used to program the soft start time. By connecting
a capacitor between the SS and GND pins, the internal current
then charges this capacitor and establishes the soft start ramp-up.
The soft start time can be calculated by the following equation:
SS
SS
SS
I
C
V
t
×
= 6
.
0
where:
CSS is the soft start capacitance.
ISS is the soft start pull-up current (3.5 µA).
If the output voltage is precharged prior to startup, the
ADP2165/ADP2166 prevent reverse inductor current that
discharges the output capacitor until the soft start voltage
exceeds the voltage on the FB pin.
When the channel is disabled or a current fault happens, the
soft start capacitor discharges.
TRACKING
The ADP2165/ADP2166 have a tracking input feature, TRK,
that allows the output voltage to track another voltage (master
voltage). It is especially useful in core and I/O voltage tracking for
field programmable gate arrays (FPGAs), digital signal processors
(DSPs), and application specific integrated circuits (ASICs).
The internal error amplifier includes three positive inputs: the
internal reference voltage, the soft start voltage, and the TRK
voltage. The error amplifier regulates the FB voltage to the
lowest of the three voltages. To track a master voltage, tie the
TRK pin to a resistor divider from the master voltage.
If the TRK function is not used, connect the TRK pin to the VREG.
POWER-GOOD (PGOOD)
The PGOOD pin is an active high, open-drain output that requires
a pull-up resistor. A logic high on the PGOOD pin indicates
that the voltage on the FB pin (and, therefore, the output
voltage) is within ±10% of the desired value. In addition, there is a
16-cycle waiting period after the FB pin is detected as being
within the ±10% range. A logic low on the PGOOD pin indicates
that the voltage on the FB pin is not within ±10% of the desired
value. Similarly, there is a 16-cycle delay to deassert PGOOD.
PEAK CURRENT-LIMIT AND SHORT-CIRCUIT
PROTECTION
The ADP2165/ADP2166 have a peak current-limit protection
circuit to prevent current runaway. When the inductor peak
current reaches the current-limit value, the high-side NFET
turns off, and the low-side NFET turns on until the next cycle,
while the overcurrent counter increments. If the overcurrent
counter count exceeds 10, the device enters hiccup mode, and
the high-side NFET and low-side NFET both turn off. The
devices remain in this mode for seven times the soft start time
and then attempt to restart from the soft start. If the current-
limit fault clears, the devices resume normal operation.
Otherwise, they reenter hiccup mode after counting 10 current-
limit violations.
OVERVOLTAGE PROTECTION
The ADP2165/ADP2166 provide an overvoltage protection
feature that protects the system from an output short to a higher
voltage supply or from a strong unload transient. If the feedback
voltage increases to 0.7 V, the internal high-side NFET turns off
and the low-side NFET turns on until the current through the
low-side NFET reaches the negative current limit. Thereafter, both
the high-side and low-side NFET are held in the off state until
the voltage at FB decreases to 0.63 V, and the devices resume
normal operation.
UNDERVOLTAGE LOCKOUT
Undervoltage lockout circuitry is integrated in the ADP2165/
ADP2166. If AVIN drops below 2.5 V, the devices turn off.
When the AVIN voltage rises above 2.6 V, the soft start period
initiates, and the devices are enabled.
THERMAL SHUTDOWN
In the event that the junction temperatures of the ADP2165/
ADP2166 rise above 150°C, the thermal shutdown circuit turns
the regulator off. Extreme junction temperatures can be the result
of high current operation, poor circuit board design, and/or
high ambient temperature. A 25°C hysteresis is included so that
when thermal shutdown occurs, the ADP2165/ADP2166 do not
return to operation until the on-chip temperature drops below
125°C. When coming out of thermal shutdown, soft start initiates.



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