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STM32F107VC Datasheet(PDF) 63 Page - STMicroelectronics

No. de pieza STM32F107VC
Descripción Electrónicos  Connectivity line, ARM®-based 32-bit MCU with 64/256 KB Flash, USB OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication interfaces
PDF  108 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F107VC Datasheet(HTML) 63 Page - STMicroelectronics

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STM32F105xx, STM32F107xx
Electrical characteristics
107
Figure 23. Recommended NRST pin protection
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 39. Otherwise the reset will not be taken into account by the device.
5.3.15
TIM timer characteristics
The parameters given in Table 40 are guaranteed by design.
Refer to Section 5.3.12: I/O current injection characteristics for details on the input/output
alternate function characteristics (output compare, input capture, external clock, PWM
output).
ai14132d
STM32F10xxx
RPU
NRST(2)
VDD
Filter
Internal Reset
0.1 µF
External
reset circuit(1)
Table 40. TIMx(1) characteristics
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3, TIM4 and TIM5 timers.
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM)
Timer resolution time
-
1
-
tTIMxCLK
fTIMxCLK = 72 MHz
13.9
-
ns
fEXT
Timer external clock
frequency on CH1 to CH4
-
0
fTIMxCLK/2
MHz
fTIMxCLK = 72 MHz
036
MHz
ResTIM
Timer resolution
-
-
16
bit
tCOUNTER
16-bit counter clock period
when internal clock is
selected
-
1
65536
tTIMxCLK
fTIMxCLK = 72 MHz 0.0139
910
µs
tMAX_COUNT Maximum possible count
-
-
65536 × 65536
tTIMxCLK
fTIMxCLK = 72 MHz
-
59.6
s



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