SCAS641

– JULY 2000

12

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

RL = 500

LOAD CIRCUIT of single-ended outputs for tpd and tsk

From Output

Under Test

CL

(see Note A)

RL = 500

S1

Vref(O)

OPEN

GND

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

Vref(OFF)

GND

TEST

S1

tw

Input

3 V

0 V

Vref(IH)

Vref(T)

Vref(IL)

From Output

Under Test

Test

Point

CL

(see Note A)

LOAD CIRCUIT of single-ended outputs for tr and tf

VOLTAGE WAVEFORMS

0 V

Output

Waveform 2

S1 at GND

(see Note B)

VOLTAGE WAVEFORMS

VOH

VOL

VDD

Vref(T)

Vref(T)

Vref(T)

tPZL

tPLZ

tPHZ

tPZH

Vref(T)

VOH – 0.3 V

VOL + 0.3 V

3 V

0 V

Output

Waveform 1

S1 at 6 V

(see Note B)

Output

Enable

(high-level

enabling)

tr

3 V

0 V

Vref(IH)

Vref(T)

Vref(IL)

Vref(T)

Vref(T)

tPLH

tPHL

tf

tw(H)

tw(L)

VOH

VOL

Input

Output

VOLTAGE WAVEFORMS

NOTES: A.CL includes probe and jig capacitance. CL = 2 pF (HCLK, HCLK), CL = 20 pF (48MHZ, REF), CL = 30 pF (PCIx, 3VMREF, 3V66).

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

14.318 MHz, ZO = 50 , tr 2.5 ns,

tf 2.5 ns.

D. The outputs are measured one at a time with one transition per measurement.

PARAMETER

3.3-V INTERFACE

2.5-V INTERFACE

UNIT

Vref(IH)

High-level reference voltage

2.4

2

V

Vref(IL)

Low-level reference voltage

0.4

0.4

V

Vref(T)

Input threshold reference voltage

1.5

1.25

V

Vref(OFF)

Off-state reference voltage

6

4.6

V

Figure 1. Load Circuit and Voltage Waveforms