5

IXDN430 / IXDI430 / IXDD430 / IXDS430

Pin Description

SYMBOL

FUNCTION

DESCRIPTION

VCC

Supply Voltage

Positive power-supply voltage input. This pin provides power to the

entire chip. The range for this voltage is from 8.5V to 35V.

IN

Input

Input signal-TTL or CMOS compatible.

EN *

Enable

The system enable pin. This pin, when driven low, disables the chip,

forcing high impedance state to the output (IXDD430 Only).

INV

Invert

Forcing INV low causes the IXDS430 to become non-inverted, while

forcing INV high causes the IXDS430 to become inverted.

OUT P

OUT N

Output

Respective P and N driver outputs. For application purposes this pin

is connected, through a resistor, to Gate of a MOSFET/IGBT. The P

and N output pins are connected together in the TO-263 and TO-220

packages.

GND

Ground

The system ground pin. Internally connected to all circuitry, this pin

provides ground reference for the entire chip. This pin should be

connected to a low noise analog ground plane for optimum

performance.

UVSEL

Select Under

Voltage Level

With UVSEL connected to Vcc, IXDS430 outputs go low at Vcc <

8.5V; W ith UVSEL open, under voltage level is set at Vcc < 12.5V

Figure 2 - Characteristics Test Diagram

* This pin is used only on the IXDD430, and is N/C (not connected) on the IXDI430 and IXDN430.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD procedures when

handling and assembling this component.

TO220 (CI)

TO263 (YI)

Vcc

OUT

GND

IN

EN*

1

2

3

4

5

Pin Configurations

(SI-CT)

28 Pin SOIC

Vcc 4

Vcc 3

Vcc 2

Vcc 1

25 Vcc

26 Vcc

27 Vcc

28 Vcc

18 GND

GND 11

16 GND

17 GND

15 GND

GND 13

GND 12

22 OUT P

23 OUT P

24 OUT P

19 OUT N

20 OUT N

21 OUT N

GND 14

N/C 7

N/C 5

UVSEL 6

IN 8

EN 9

INV 10

+

Vin

-

Vcc

EN

IN

GND

OUT

Vcc

+

IXDD430

C

LOAD

-

C

BYPASS/

.

.

FILTER