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STM32H7B3II Datasheet(PDF) 127 Page - STMicroelectronics

No. de pieza STM32H7B3II
Descripción Electrónicos  32-bit Arm® Cortex®-M7 280 MHz MCUs, 2-Mbyte flash memory, 1.4-Mbyte RAM, 46 com. and analog interfaces, SMPS, crypto
PDF  238 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H7B3II Datasheet(HTML) 127 Page - STMicroelectronics

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1. Guaranteed by characterization results.
Table 75. Asynchronous non-multiplexed SRAM/PSRAM/NOR write-NWAIT timings
NWAIT pulse width is equal to 1 AHB cycle.
Symbol
Parameter
Min(1)
Max(1)
Unit
tw(NE)
FMC_NE low time
8Tfmc_ker_ck − 1
8Tfmc_ker_ck + 1
ns
tw(NWE)
FMC_NWE low time
6Tfmc_ker_ck − 1
6Tfmc_ker_ck + 1
tsu(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high
5Tfmc_ker_ck + 13
-
th(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid
4Tfmc_ker_ck+ 12
-
1. Guaranteed by characterization results.
Figure 38. Asynchronous multiplexed PSRAM/NOR read waveforms
NBL
Data
FMC_NBL[1:0]
FMC_AD[15:0]
tv(BL_NE)
th(Data_NE)
Address
FMC_A[25:16]
tv(A_NE)
FMC_NWE
tv(A_NE)
Address
FMC_NADV
tv(NADV_NE)
tw(NADV)
tsu(Data_NE)
th(AD_NADV)
FMC_NE
FMC_NOE
tw(NE)
tw(NOE)
tv(NOE_NE)
th(NE_NOE)
th(A_NOE)
th(BL_NOE)
tsu(Data_NOE)
th(Data_NOE)
FMC_NWAIT
tsu(NWAIT_NE)
th(NE_NWAIT)
Table 76. Asynchronous multiplexed PSRAM/NOR read timings
Symbol
Parameter
Min(1)
Max(1)
Unit
tw(NE)
FMC_NE low time
4Tfmc_ker_ck − 1
4Tfmc_ker_ck + 1
ns
STM32H7B3xI
Operating conditions
DS13139 - Rev 8
page 127/238



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