ADM1177

Preliminary Technical Data

Rev. PrD | Page 14 of 16

READ VOLTAGE AND/OR CURRENT DATA BYTES

The ADM1177 can be set up to provide information in three

different ways (see Write Command Byte section above).

Depending on how the device is configured the following data

can be read out of the device after a conversion (or

conversions):

1.

Voltage and Current Readback.

The ADM1177 will digitize both voltage and current. Three

bytes will be read out of the device in the following format:

Table 11.

Byte

Contents

B7

B6

B5

B4

B3

B2

B1

B0

1

Voltage

MSBs

V11

V10

V9

V8

V7

V6

V5

V4

2

Current

MSBs

I11

I10

I9

I8

I7

I6

I5

I4

3

Voltage

LSBs

V3

V2

V1

V0

I3

I2

I1

I0

2.

Voltage Readback

.

The ADM1177 will digitize voltage only. Two bytes will be read

out of the device in the following format:

Table 12.

Byte Contents

B7

B6

B5 B4 B3 B2

B1

B0

1

Voltage MSBs

V11

V10 V9

V8

V7

V6

V5

V4

2

Voltage LSBs

V3

V2

V1

V0

0

0

0

0

3.

Current Readback

.

The ADM1177 will digitize current only. Two bytes will be read

out of the device in the following format:

Table 13.

Byte Contents

B7

B6

B5 B4 B3 B2

B1

B0

1

Current MSBs

I11

I10

I9

I8

I7

I6

I5

I4

2

Current LSBs

I3

I2

I1

I0

0

0

0

0

The following series of events occur when the master receives

three bytes (voltage and current data) from the slave device:

1.

The master device asserts a START condition on SDA.

2.

The master sends the 7-bit slave address followed by

the read bit (high).

3.

The addressed slave device asserts ACK on SDA.

4.

The master receives the first data byte.

5.

The master asserts ACK on SDA.

6.

The master receives the second data byte.

7.

The master asserts ACK on SDA.

8.

The master receives the third data byte.

9.

The master asserts NO ACK on SDA.

10.

The master asserts a STOP condition on SDA and the

transaction ends.

For the cases where the master is reading voltage only or

current only, only two data bytes will be read and events 7 and 8

above will not be required.

S

SLAVE

ADDRESS

RA

A

DATA 1

A

P

DATA 2

N

12

34

5

6

7

89 10

DATA 3

Figure 12. Three Byte Read fromADM1177

S

SLAVE

ADDRESS

RA

A

REGISTER

ADDRESS

P

REGISTER

DATA

N

12

34

5

6

78

Figure 13. Two Byte Read fromADM1177

Read Status Register

A single register of status data can also be read from the

ADM1177.

1.

The master device asserts a START condition on SDA.

2.

The master sends the 7-bit slave address followed by

the read bit (high).

3.

The addressed slave device asserts ACK on SDA.

4.

The master receives the status byte.

5.

The master asserts ACK on SDA.

S

SLAVE

ADDRESS

RA

A

DATA 1

12

34

5

Figure 14. Status Read fromADM1177

Table 14 shows the ADM1177 status registers in detail. Note

that bits 1, 3 and 5 are cleared by writing to bit 4 of the

ALERT_EN register (CLEAR).