IDTTM/ICSTM

DDR I/DDR II Phase Lock Loop Zero Delay Buffer

ICS9P935

REV H

12/1/08

ICS9P935

DDR I/DDR II Phase Lock Loop Zero Delay Buffer

6

Electrical Characteristics - Input/Supply/Common Output Parameters

TA = 0 - 70°C; Supply Voltage AVDD, VDD = 2.5V ± 0.2V

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input High Current

IIH

VI = VDD or GND

5

µA

Input Low Current

IIL

VI = VDD or GND

5

µA

IDD2.5

CL = 0pf @ 200MHz

250

mA

IDDPD

CL = 0pf

100

µA

Output High Current

IOH

VDD = 2.3V, VOUT = 1V

-18

-32

mA

Output Low Current

IOL

VDD = 2.3V, VOUT = 1.2V

26

35

mA

High Impedance

Output Current

IOZ

VDD=2.7V, Vout=VDD or GND

±10

mA

Input Clamp Voltage

VIK

VDDQ = 2.3V Iin = -18mA

-1.2

V

VDD = min to max,

IOH = -1 mA

VDDQ - 0.1

V

VDDQ = 2.3V,

IOH = -12 mA

1.7

V

VDD = min to max

IOL=1 mA

0.1

V

VDDQ = 2.3V

IOH=12 mA

0.6

V

Input Capacitance

1

CIN

VI = GND or VDD

3pF

Output Capacitance

1

COUT

VOUT = GND or VDD

3pF

Operating Supply

Current

High-level output

voltage

VOH

Low-level output voltage

VOL