WMS7204 datasheet(9/32 Pages) WINBOND

9 / 32 page

WMS7204

Publication Release Date: January 2003

- 9 -

Revision 1.0

7.3. NON-VOLATILE MEMORY (NVMEM)

Each channel has four NVMEM positions available for storing the output buffer operating mode and

the potentiometer setting. These NVMEM positions can be directly written through the SPI using a

write command (#5) with address and data bytes. Another command (#7) is available that stores the

current output buffer operating mode and potentiometer settings into the selected NVMEM position.

Bit A3 and A2 in the instruction byte decide which NVMEM position is used. (See Table 5)

All potentiometers are loaded with the value stored in the NVMEM position 0 for their respective

channel on power up.

7.3.1 Write Protect of NVMEM

Write-protect ( WP ) disables any changes of current content in the NVMEM regardless of the

commands, except that NVMEM setting can be retrieved using commands 4, 6 of Table 5. Therefore,

Write-Protect ( WP ) pin provides hardware NVMEM protection feature with WP tied to Vss. WP ,

which is active at logic LOW, should be tied directly to VDD if it is not being used.

7.4 FLOW CONTROL

Reading and writing to NVMEM requires an internal access cycle to complete before the next

command can be sent. The following commands have additional flow control using the

pin.

Read Tap Register (#2)

Read NVMEM (#4)

Program NVMEM (#5)

Load Tap Register(#6)

Program NVMEM with Tap Register (#7)

The

bit will be pulled HIGH when CS goes LOW, and will stay HIGH indicating the chip is

ready to accept another command. After sending one of those commands, the

pin should be

polled to determine when the device is ready to accept the additional data.

This flow control can be used on all commands without any performance penalty although it is only

needed on the commands listed above.

WMS7204 Datasheet(PDF) 9 Page - Winbond