MAX5065 datasheet(21/32 Pages) MAXIM

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Dual-Phase, +0.6V to +3.3V Output Parallelable,

Average-Current-Mode Controllers

______________________________________________________________________________________

Protection

The MAX5067 includes output overvoltage protection

(OVP), undervoltage protection (UVP), phase failure,

and overload protection to prevent damage to the pow-

ered electronic circuits.

Overvoltage Protection (MAX5067)

The OVP comparator compares the OVPIN input to the

overvoltage threshold (Figure 7). The overvoltage

threshold is typically +0.8V. A detected overvoltage

event latches the comparator output forcing the power

stage into the OVP state. In the OVP state, the high-

side MOSFETs turn off and the low-side MOSFETs latch

on. Use the OVPOUT high-current output driver to turn

on an external crowbar SCR. When the crowbar SCR

turns on, a fuse must blow or the source current for the

MAX5067 regulator must be limited to prevent further

damage to the external circuitry. Connect the SCR

close to the input source and after the fuse. Use an

SCR large enough to handle the peak I2t energy due to

the input and output capacitors discharging and the

current sourced by the power-source output. Connect

DIFF to OVPIN for differential output sensing and over-

voltage protection. Add an RC delay to reduce the sen-

sitivity of the overvoltage circuit and avoid nuisance

tripping of the converter (Figures 1, 2). Connect a resis-

tor-divider from the load to SGND to set the OVP output

voltage.

Power-Good Generator (MAX5067)

The PGOOD output is high if all of the following condi-

tions are met (Figure 8):

1) The output is within 90% to 108% of the pro-

grammed output voltage.

2) Both phases are providing current.

3) EN is high.

A window comparator compares the differential amplifier

output (DIFF) against 1.08 times the set output voltage

for overvoltage and 0.90 times the set output voltage for

undervoltage monitoring. The phase-failure comparator

detects a phase failure by comparing the current-error-

amplifier output (CLP_) with a 2.0V reference.

Use a 10k

Ω pullup resistor from PGOOD to a voltage

source less than or equal to VCC. An output voltage

outside the comparator window or a phase-failure con-

dition forces the open-drain output low. The open-drain

MOSFET sinks 4mA of current while maintaining less

than 0.2V at the PGOOD output.

OVP









10 8

MAX5067

RIN

OVPIN

DIFF

EAN

EAOUT

VOUT

Figure 7. OVP Input Delay

+2.0V

PHASE-FAILURE DETECTION

CLP2

CLP1

VREF

DIFF

PGOOD

8% OF VREF

10% OF VREF

Figure 8. Power-Good Generator (MAX5067)

(8)

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