Application information

The

PESD1LIN is designed for the protection of one LIN-bus signal line from the

damage caused by ESD and surge pulses. The

PESD1LIN provides a surge capability

of up to 160 W per line for a 8/20

µs waveform.

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)

and surge transients. The following guidelines are recommended:

1. Place the PESD1LIN as close to the input terminal or connector as possible.

2. The path length between the PESD1LIN and the protected line should be minimized.

3. Keep parallel signal paths to a minimum.

4. Avoid running protection conductors in parallel with unprotected conductor.

5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground

loops.

6. Minimize the length of the transient return path to ground.

7. Avoid using shared transient return paths to a common ground point.

8. Ground planes should be used whenever possible. For multilayer PCBs, use ground

vias.

Test information

Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is

suitable for use in automotive applications.

Fig 6.

Typical application: ESD protection of one automotive LIN-bus line

006aaa678

LIN

transceiver

PESD1LIN

CMASTER/SLAVE

CBAT

24 V

application (e.g. voltage regulator and microcontroller)

power application (e.g. electro motor, inductive loads)

LIN node

connector

15 V

BAT

GND

LIN

1

2

PESD1LIN

Rev:2023A2

5