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SST25WF080B Datasheet(PDF) 10 Page - Microchip Technology |
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SST25WF080B Datasheet(HTML) 10 Page - Microchip Technology |
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10 / 44 page ![]() SST25WF080B DS20005164H-page 10 2013-2022 Microchip Technology Inc. and its subsidiaries High-Speed Read Read Memory at Higher Speed 0000 1011b (0BH) 3 1 1 to 40 MHz Fast-Read Dual-Output Read Memory with Dual Output 0011 1011b (3BH) 3 1(3) 1 to (3) Fast-Read Dual I/O Read Memory with Dual Address Input and Data Output 1011 1011b (BBH) 3(3) 1(3) 1 to (3) 4-Kbyte Sector Erase(4) Erase 4 Kbyte of memory array 0010 0000b (20H) 1101 0111b (D7H) 30 0 64-Kbyte Block Erase(5) Erase 64-Kbyte block of memory array 1101 1000b (D8H) 3 0 0 Chip Erase Erase Full Memory Array 0110 0000b (60H) or 1100 0111b (C7H) 00 0 Page Program To program up to 256 bytes 0000 0010b (02H) 3 0 1 to 256 RDSR(6) Read STATUS Register 0000 0101b (05H) 0 0 1 to WRSR Write STATUS Register 0000 0001b (01H) 0 0 1 WREN Write Enable 0000 0110b (06H) 0 0 0 WRDI Write Disable 0000 0100b (04H) 0 0 0 RDID(7, 8) Read-ID 1010 1011b (ABH) 3 0 1 to JEDEC-ID JEDEC ID Read 1001 1111b (9FH) 0 0 4 to DPD Deep Power-Down Mode 1011 1001b (B9H) 0 0 0 RDPD(8) Release from Deep Power-Down or Read ID 1010 1011b (ABH) 0 0 0 TABLE 5-1: DEVICE OPERATION INSTRUCTIONS Instruction Description Op Code Cycle(1) Address Cycle(s)(2) Dummy Cycle(s) Data Cycle(s) Maximum Frequency Note 1: One bus cycle is eight clock periods. 2: Address bits above the most significant bit of each density can be VIL or VIH. 3: One bus cycle is four clock periods in Dual Operation 4: 4-Kbyte Sector Erase addresses: use AMS-A12, remaining addresses are “don’t care” but must be set either at VIL or VIH. 5: 64-Kbyte Block Erase addresses: use AMS-A16, remaining addresses are “don’t care” but must be set either at VIL or VIH. 6: The Read STATUS Register is continuous with ongoing clock cycles until terminated by a low-to-high tran- sition on CE#. 7: Device ID is read after three dummy address bytes. The Device ID output stream is continuous until ter- minated by a low-to-high transition on CE#. 8: The instructions Release from Deep Power down and Read-ID are similar instructions (ABH). Executing Read-ID requires the ABH instruction, followed by 24 dummy address bits to retrieve the Device ID. Release from Deep Power-Down only requires the instruction ABH. |
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