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LT7184S Datasheet(PDF) 34 Page - Analog Devices

No. de pieza LT7184S
Descripción Electrónicos  Dual Channel 9A, 16V PolyPhase Step-Down Silent Switcher 2 with Digital Power System Management
PDF  52 Pages
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LT7184S Datasheet(HTML) 34 Page - Analog Devices

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Data Sheet
LT7184S
analog.com
Rev. 0
34 of 52
Minimum On-Time and Minimum Off-Time Considerations
The minimum on-time, tON(MIN), is the smallest duration of time in which the top power MOSFET can be in its on state.
This time is a function of input and output voltage, switching frequency, and output load current, and typically, the
smallest value that the LT7184S can support is about 25ns at 1A load. In continuous conduction, the worst-case
minimum on-time limit imposes a maximum switching frequency of:
fSW MAX =
VOUT
VIN×40ns
(1).
Where 40ns corresponds to the worst-case upper limit of tON(MIN) at no load, the maximum junction temperature is
150°C, and fSW(MAX) is the maximum supported switching frequency. If the frequency is set higher than tON(MIN) allows,
the LT7184S valley current control architecture keeps the output voltage in regulation, and the switching frequency
decreases from it is programmed value. This is an acceptable result in many applications, so this constraint may not
be of critical importance. High switching frequencies may be used in the design without causing output over-
voltage. However, if frequency synchronization is required (such as in PolyPhase applications), fSW should be set no
higher than the maximum value achievable at the maximum tON(MIN) of 40ns and the maximum PVIN and minimum VOUT
for the application. Note that tON(MIN) decreases with load current and increases with negative loads.
The minimum off-time, tOFF(MIN), is the smallest amount of time that the LT7184S can turn on the bottom power
MOSFET, tripping the current comparator, and turning the bottom power MOSFET back off. This time is typically
about 85ns. The minimum off-time imposes a maximum duty cycle of tON/(tON+tOFF(MIN)). If the ratio VOUT/PVIN exceeds
the maximum duty cycle, for example, due to an input voltage dropping, then the output voltage drops out of
regulation.
To avoid the output voltage dropping out of regulation due to the tOFF(MIN) limitation, the switching frequency should
be set to no higher than:
fSW ≤
(1−
VOUT (MAX)
VIN (MIN)
)
120ns
(2).
Based on the minimum input voltage and maximum output voltage for the application. Note that the 120ns in
Equation 2 corresponds to the maximum tOFF(MIN) for the LT7184S at maximum junction temperature of 150 °C.
PROGRAMMABLE CURRENT LIMIT
The LT7184S current limit operates by limiting the output current based on the valley of the inductor current ripple
waveform, as shown in Figure 35 and Figure 36. As shown in Figure 35, when the positive valley current limit is
engaged (providing an output current to the load), the inductor valley current is at ILIM-POS, while the average output
current is ILIM-POS + ΔIL/2, and the peak inductor current is ILIM-POS + ΔIL, where ΔIL is the inductor ripple current. If ILIM-
POS
is reached, the IOUT_OC fault STATUS bit is set. Refer to the STATUS commands in the LT7184S PMBus/I2C
Reference Manual.
Figure 35. ILIM(POS)



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