LT7184S datasheet(24/52 Pages) AD

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Data Sheet

LT7184S

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Rev. 0

24 of 52

Refer to the LT7184S PMBus/I2C Reference Manual or contact the factory for details on efficient in-system EEPROM

programming, including bulk EEPROM programming.

Power-up and Initialization

The LT7184S is capable of stand-alone supply sequencing and controlled turn-on and turn-off operation. It operates

from either a single input supply or two independent input supplies (PVIN0 and PVIN1). To reduce LT7184S power

dissipation, EXTVCC can be driven with an external 3V to 5.5V supply or connected to an output of the LT7184S that

provides 3V to 5.5V. If EXTVCC is connected to 3V to 5.5V, the supported PVIN0 input operating range is 1.5V to 16V.

Without EXTVCC, the PVIN0 operating range is 2.9V to 16V. The PVIN1 operating range is 1.5V to 16V. PVIN1 and EXTVCC or

PVIN0 must be powered for Channel 1 to operate. EXTVCC, PVIN0, and PVIN1 may be applied in any order without concern

for power supply sequencing of the LT7184S.

The LT7184S is initialized upon application of power to PVIN0 or EXTVCC or when an MFR_RESET or

RESTORE_USER_ALL command is sent. In the initialization step, the LT7184S reads the EEPROM configuration and/or

resistor configuration pins to set the initial state of the PMBus commands.

During initialization, both channels, VSENSEP and VSENSEN pins, are tested for continuity by pulling up and down on VSENSEP

and only pulling up on VSENSEN with a weak current for a short time window. If any of the VSENSE pins are found to be

high impedance, MFR_DISABLE_OUTPUT is asserted for both channels. This feature protects a system from

overvoltage if a VSENSE connection becomes open. Also, during initialization, the PGOODN pins are held low,

SHARE_CLK is held low, the RUNN pins are pulled down with 1.5mA (typical), and the FAULTN pins are in a high-

impedance state.

If the CFG resistor configuration pins are enabled, the LT7184S initializes certain commands based on the

configuration resistor values, which supersede the EEPROM settings. Resistor configuration pins are enabled by

factory default. Clear Bit 6 of MFR_CONFIG_ALL_LT7184S in EEPROM to disable CFG pins. See Using Resistor

Configuration Pins in the Applications Information section for more details. For commands that are not initialized

based on the configuration resistors, initial values are determined by EEPROM or factory defaults.

LT7184S initialization typically requires 13ms. If CFG pins are disabled (MFR_CONFIG_ALL_LT7184S bit 6 set to 1 in

EEPROM), the initialization time is reduced to 10ms (typical).

After initialization is complete, comparators monitor PVIN0 and PVIN1. The PVIN voltage must exceed the channel's

programmable VIN_ON threshold for the channel to operate. By default, SHARE_CLK will be held low until PVIN0 exceeds

VIN_ON for PAGE0 or if PVIN0 falls below VIN_OFF. By default, PVIN1 does not affect SHARE_CLK. The default behavior for

both channels is to turn off and remain off if SHARE_CLK is low. Refer to the MFR_CHAN_CONFIG_LT7184S command

in the LT7184S PMBus/I2C Reference Manual for information on configuring this behavior.

The RUN pin pull-down current (1.5mA typical) is released by the LT7184S after the device completes POR

initialization and the first time the channel's PVIN potential exceeds the VIN_ON threshold.

Shutdown

The LT7184S can be programmed to turn off immediately or to sequence off.

When sequencing off, the LT7184S waits for the turn-off delay and then performs a soft-stop ramp in which the

regulation target voltage is ramped down to zero. The turn-off delay is set by the TOFF_DELAY command, defaulting

to 0ms. The target voltage ramp-down time is set by the TOFF_FALL command, defaulting to 2ms.

Sequencing off occurs if the OPERATION command is set to 0x40, or the RUN pin is de-asserted, and ON_OFF_CONFIG

Bit 0 is set to 0, and Bit 2 is set to 1.

When immediate turn-off occurs, the regulator quickly ramps the inductor current to zero and then stops switching.

In this case, the output voltage decays based only on the load current and the internal 260Ω pull-down resistor from

VSENSENP to VSENSENN. Immediate shutdown occurs in any of the following situations:



PVIN falls below the VIN_OFF threshold.



If the OPERATION command is cleared to 0x00, if ON_OFF_CONFIG bit 3 is set to 1.



A fault condition occurs, which causes the output to turn off.

LT7184S Datasheet(PDF) 24 Page - Analog Devices

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