HT86R384 datasheet(21/41 Pages) HOLTEK

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HT86R384

Rev. 0.10

May 18, 2007

Preliminary

Voice Control Register

The voice control register controls the voice ROM circuit

and DAC circuit, selects voice ROM latch counter, and

controls 32kHz crystal to start in speed-up mode or not.

If the DAC circuit is not enabled, any DAH/DAL output is

invalid. Writing a

²1² to DAC bit is to enable DAC circuit,

and writing a

²0² to DAC bit is to disable DAC circuit. If

the voice ROM circuit is not enabled, then voice ROM

data cannot be accessed at all. Writing a

²1² to VROMC

bit is to enable the voice ROM circuit, and writing a

²0² to

VROMC bit is to disable the voice ROM circuit. The bit 4

(LATCHC) is to determine what voice ROM address

latch counter will be adopted as voice ROM address

latch counter. The bit 7 (FAST) is to determine how to

activate 32kHz crystal of TMR3

¢s clock source.

Voice ROM Data Address Latch Counter

LATCH0H(18H)/LATCH0M(19H)/LATCH0L(1AH),

LATCH1H(1BH)/LATCH1M(1CH)/LATCH1L(1DH) and

voice ROM data register(2AH)

The voice ROM data address latch counter is the hand-

shaking between the microcontroller and voice ROM,

where the voice codes are stored. One 8-bit of voice

ROM data will be addressed by setting 21-bit address

latch counter LATCH0H/LATCH0M/LATCH0L or

LATCH1H/LATCH1M/LATCH1L. After the 8-bit voice

ROM data is addressed, a few instruction cycles (4

msat

least) will be cost to latch the voice ROM data, then the

microcontroller can read the voice data from

LATCHD(2AH).

Example: Read an 8-bit voice ROM data which is lo-

cated at address 000007H by address latch 0

set

[26H].2

; Enable voice ROM circuit

clr

[26H].4

; Select voice ROM address

; latch counter 0

mov

A, 07H

;

mov

LATCH0L, A ; Set LATCH0L to 07H

mov

A, 00H

;

mov

LATCH0M, A ; Set LATCH0M to 00H

mov

A, 00H

;

mov

LATCH0H, A ; Set LATCH0H to 00H

call

Delay Time

; Delay a short period of time

mov

A, LATCHD

; Get voice data at 000007H

Bit No.

Label

Function

0, 3, 5~6

Unused bit, read as

²0²

DAC

Enable/disable DAC circuit

(0= disable DAC circuit; 1= enable DAC circuit)

The DAC circuit is not affected by the HALT instruction.

The software controls bit DAC (VoiceC.1) whether to enable/disable.

VROMC

Enable/disable voice ROM circuit

(0= disable voice ROM circuit; 1= enable voice ROM circuit)

LATCHC

Select voice ROM counter (0= voice ROM address latch 0; 1= voice ROM address latch 1)

FAST

Enable/disable speed-up 32kHz crystal. Default to 0.

(0= speed-up 32kHz crystal; 1= non-speed-up 32kHz crystal)

VOICEC (26H) Register

OTP Option

Description

PA Wake-up

Enable/disable PA wake-up function

Watchdog Timer (WDT)

Enable/disable WDT function

One or two CLR instruction

WDT clock source is from WDTOSC or T1

External INT Trigger Edge

External INT is triggered on falling edge only, or is triggered on falling and rising

edge.

Timer 3 Clock Source

Timer3

¢s clock source is from T1, or is from the external 32kHz crystal which is

connected to XIN and XOUT.

External Timer 0/1 Clock Source Enable/disable external timer of Timer 0 and Timer 1, share with PC4 and PC5.

PA Pull-high

Enable/disable PA pull-high

PB Pull-high

Enable/disable PB pull-high

PC Pull-high

Enable/disable PC pull-high

HT86R384 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

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