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TMP86FS49AIUG Datasheet(PDF) 279 Page - Toshiba Semiconductor |
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TMP86FS49AIUG Datasheet(HTML) 279 Page - Toshiba Semiconductor |
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279 / 296 page  Page 263 TMP86FS49AIUG 21. Input/Output Circuit 21.1 Control pins The input/output circuitries of the TMP86FS49AIUG control pins are shown below. Note: The TEST pin of TMP86FS49AIUG does not have a pull-down resistor. Fix the TEST pin at Low level. Control Pin I/O Input/Output Circuitry Remarks XIN XOUT Input Output Resonator connecting pins (high frequency) Rf = 1.2 MΩ (typ.) RO =0.5 kΩ (typ.) XTIN XTOUT Input Output Resonator connecting pins (Low frequency) Rf = 6 MΩ (typ.) RO = 220 kΩ (typ.) RESET Input Hysteresis input Pull-up resistor RIN = 220 kΩ (typ.) R = 100 Ω (typ.) TEST Input R = 100 Ω (typ.) fc Rf RO Osc.enable XIN XOUT VDD VDD fs Rf RO Osc.enable XTIN XTOUT VDD XTEN VDD Address-trap-reset Watchdog-timer-reset System-clock-reset R RIN VDD R VDD |
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