LAN9252VSLASHML datasheet(10/329 Pages) MICROCHIP

10 / 329 page

LAN9252

DS00001909A-page 10

 2015 Microchip Technology Inc.

Microcontroller Mode:

The LAN9252 communicates with the microcontroller through an SRAM-like slave interface.

The simple, yet highly functional host bus interface provides a glue-less connection to most common 8 or 16-bit micro-

processors and microcontrollers as well as 32-bit microprocessors with an 8 or 16-bit external bus.

Alternatively, the device can be accessed via SPI or Quad SPI, while also providing up to 16 inputs or outputs for general

purpose usage.

Expansion Mode:

While the device is in SPI or Quad SPI mode, a third networking port can be enabled to provide an

additional MII port. This port can be connected to an external PHY, to enable star or tree network topologies, or to

another LAN9252 to create a four port solution. This port can be configured for the upstream or downstream direction.

Digital I/O Mode:

For simple digital modules without microcontrollers, the LAN9252 can operate in Digital I/O Mode

where 16 digital signals can be controlled or monitored by the EtherCAT master. Six control signals are also provided.

Figure 2-3 provides a system level overview of each mode of operation.

FIGURE 2-3:

MODES OF OPERATION

LAN9252

Microprocessor/

Microcontroller

SPI / Quad SPI

LAN9252

Microprocessor/

Microcontroller

Host Bus Interface

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Microcontroller Mode

(via Host Bus Interface)

Microcontroller Mode

(via SPI)

Digital I/Os

LAN9252

PHY

MII

LAN9252

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

RJ45

or Fiber

Magnetics or

Fiber Xcvr

Digital I/O Mode

Expansion Mode

GPIOs

Microprocessor/

Microcontroller

SPI / Quad SPI

RJ45

or Fiber

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