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MP44019GS Datasheet(PDF) 20 Page - Monolithic Power Systems |
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MP44019GS Datasheet(HTML) 20 Page - Monolithic Power Systems |
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20 / 29 page ![]() MP44019 – CRM/DCM MULTI-MODE PFC CONTROLLER WITH SECOND OVP MP44019 Rev. 1.0 MonolithicPower.com 20 4/30/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. APPLICATION INFORMATION Design Requirements Table 1 lists recommended design requirements. Table 1: Recommended Designs Parameter Symbol Value Input AC RMS voltage VAC 85VAC to 265VAC Input AC voltage frequency fLINE 47Hz to 63Hz Output voltage VOUT 400V Output voltage ripple VO_RIPPLE ≤3% VOUT Output voltage OVP threshold ∆OVP 40V Output power POUT 240W Efficiency η ≥93% Power Stage Design Selecting the Bridge The diode bridge should withstand the maximum reverse input AC voltage and the maximum input current. When selecting a diode bridge, consider the maximum instantaneous voltage (the peak voltage of the line voltage) and the maximum input RMS current (the input RMS current at low- line). In addition, the package size and thermal performance should also be considered. To handle the line frequency current, use a standard, low-cost diode bridge with a slow recovery. In this case, the maximum input RMS current can be calculated with Equation (15): OUT AC_MAX MIN AC_MIN P I = = 3.04(A) V (15) The maximum instantaneous voltage can be estimated with Equation (16): IN_MAX AC_MAX V = 2 V = 375(V) (16) A standard 600V/8A bridge can be selected to provide enough margin. Selecting the Input Capacitor The input capacitor that is placed before the boost inductor provides a bypass path for the high switching frequency current and minimizes fluctuation on the rectified sinusoidal input voltage. In general, a voltage drop up to 10% on the input capacitor may be expected. The worst- case condition occurs when the input voltage is below its minimum threshold voltage due to a large current ripple. The input capacitor (CIN) can be calculated with Equation (17): AC_MAX IN SW AC_MIN I C = 2 f r V (17) Where r is the coefficient (0.01 to 0.1), and fSW is the switching frequency at the peak of the minimum input AC voltage. Select a capacitor with good high-frequency performance, such as a film capacitor. For example, assume a minimum fSW (e.g. 40kHz) and set r to be 0.05. Then the input capacitance can be calculated with Equation (18): AC_MAX IN SW AC_MIN I C = = 2.85 F 2 f r V (18) Two 1μF film capacitors with a 450V voltage rating are recommended to act as the input capacitors because they provide high-frequency energy during the switching cycle. Boost Inductor Design The boost inductance value (LMAX), which is required to ensure that the maximum load can be delivered from the minimum input voltage, can be estimated with Equation (19): 2 AC_MIN ON_MAX MAX OUT Vt L = 2P (19) The boost inductance value should be below LMAX. A normal inductance is recommended to use a 60% to 70% ratio for LMAX to avoid tON being close to tON_MAX. If the ratio is selected to be 60%, the actual inductance can be calculated with Equation (20): 2 AC_MIN ON_MAX ACTUAL OUT V t Ratio L = = 182 H 2P (20) The boost inductance value should exceed LMIN. To avoiding triggering over-current protection (OCP) when triggering the over-current limit (OCL), there is a delay time (tCS_DELAY) of 100ns, as well as a MOSFET turn-off delay. |
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