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EF9345 Datasheet(PDF) 5 Page - STMicroelectronics

No. de pieza EF9345
Descripción Electrónicos  HMOS2 SINGLE CHIP SEMI-GRAPHIC DISPLAY PROCESSOR
PDF  38 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

EF9345 Datasheet(HTML) 5 Page - STMicroelectronics

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MEMORY INTERFACE
VCC = 5.0V
±5%, TA = 0 to + 70°C
Clock : fin = 12MHz ; Duty Cycle 40 to 60% ; tr,tf < 5ns
Reference Levels : VIL = 0.8V and VIH =2V, VOL = 0.4V and VOH = 2.4V
Symbol
Ident. N
°
Parameter
Min.
Typ.
Max.
Unit
tELEL
1
Memory Cycle Time
500
ns
tD
2
Output Delay Time from CLK Rising Edge (ASM, OE, WE)
60
ns
tEHEL
3
ASM High Pule Width
120
ns
tELDV
4
Memory Access Time from ASM Low
290
ns
tDA
5
Output Delay Time from CLK Rising Edge (ADM(0:7), AM(8:13))
80
ns
tAVEL
6
Address Setup Time to ASM
30
ns
tELAX
7
Address Hold Time from ASM
55
ns
tCLAZ
8
Address Off Time
80
ns
tGHDX
9
Memory Hold Time
10
ns
tOZ
10
Data Off Time from OE
60
ns
tGLDV
11
Memory OE Access Time
150
ns
tQVWL
12
Data Setup Time (Write Cycle)
30
ns
tWHQX
13
Data Hold Time (Write Cycle)
30
ns
tWLWH
14
WE Pulse Width
110
ns
V
DD
R
C L
Test
Point
R L
MMD7000
or equivalent
Figure 1 : Test Load
Table 1
Symbol
AM(8:13)
ADM(0:7)
AD(0:7)
Other
Outputs
C
100pF
50pF
RL
1k
Ω
3.3k
Ω
R
4.7k
Ω
4.7k
Ω
READ ADDRESS
WRITE ADDRESS
D IN
D OUT
CLK
ASM
ADM (0:7)
AM (8:14)
OE
WE
T
1
2
3
4
56
7
8
9
10
11
12
13
14
56
7
5
2
22
2
2
Figure 2 : Memory Interface Timing Diagram
EF9345
5/38



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