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MB85RS128TY Datasheet(PDF) 10 Page - RAMXEED LIMITED |
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MB85RS128TY Datasheet(HTML) 10 Page - RAMXEED LIMITED |
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10 / 30 page ![]() MB85RS128TY(AEC-Q100 Compliant) 10 DS501-00048-7v0-E SLEEP The SLEEP command shifts the LSI to a low power mode called “SLEEP mode”. The transition to the SLEEP mode is carried out at the rising edge of CS after operation code in the SLEEP command. However, when at least one SCK clock is inputted before the rising edge of CS after operation code in the SLEEP command, this SLEEP command is canceled. After the SLEEP mode transition, SCK and SI inputs are logically ignored and SO changes to a High-Z state. If input pin(s) other than CS pin is (are) not fixed to VSS or VDD, flow-throw current may flow. Returning to an normal operation from the SLEEP mode is carried out after tREC (Max 400 s) time from the falling edge of CS (see the figure below). It is possible to return CS to H level before tREC time. However, it is prohibited to bring down CS to L level again during tREC period. Enter Sleep Mode CS SCK SI Invalid Invalid High-Z Sleep Mode Entry 67 012345 SO 1 101110 0 CS CS tREC Exit Sleep Mode Sleep Mode Exit From this time Command input enable |
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