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MB85RS128TY Datasheet(PDF) 11 Page - RAMXEED LIMITED

No. de pieza MB85RS128TY
Descripción Electrónicos  128K (16K X 8) Bit SPI
PDF  30 Pages
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Fabricante Electrónico  RAMXEED [RAMXEED LIMITED]
Página de inicio  https://www.ramxeed.com/
Logo RAMXEED - RAMXEED LIMITED

MB85RS128TY Datasheet(HTML) 11 Page - RAMXEED LIMITED

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MB85RS128TY(AEC-Q100 Compliant)
DS501-00048-7v0-E
11
BLOCK PROTECT
Writing protect block for WRITE command is configured by the value of BP0 and BP1 in the status register.
WRITING PROTECT
Writing operation of the WRITE command and the WRSR command are protected with the value of WEL,
WPEN, WP as shown in the table.
HOLD OPERATION
Hold status is retained without aborting a command if HOLD is “L” level while CS is “L” level. The timing for
starting and ending hold status depends on the SCK to be “H” level or “L” level when a HOLD pin input is
transited to the hold condition as shown in the diagram below. In case the HOLD pin transited to “L” level
when SCK is “L” level, return the HOLD pin to “H” level at SCK being “L” level. In the same manner, in case
the HOLD pin transited to “L” level when SCK is “H” level, return the HOLD pin to “H” level at SCK being “H”
level. Arbitrary command operation is interrupted in hold status, SCK and SI inputs become do not care.
And, SO becomes High-Z while reading command (RDSR, READ). If CS is rising during hold status, a
command is aborted. In case the command is aborted before its recognition, WEL holds the value before
transition to hold status.
BP1
BP0
Protected Block
0
0
None
0
1
3000H to 3FFFH (upper 1/4)
1
0
2000H to 3FFFH (upper 1/2)
1
1
0000H to 3FFFH (all)
WEL
WPEN
WP
Protected Blocks
Unprotected Blocks
Status Register
0
X
X
Protected
Protected
Protected
1
0
X
Protected
Unprotected
Unprotected
1
1
0
Protected
Unprotected
Protected
1
1
1
Protected
Unprotected
Unprotected
SCK
CS
Hold Condition
HOLD
Hold Condition



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