ST7FLCD1_05 datasheet(87/95 Pages) STMICROELECTRONICS

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ST7FLCD1

Electrical Characteristics

The ST7FLCD1 device contains circuitry to protect the inputs against damage due to high static

voltage or electric field. Nevertheless it is advised to take normal precautions and to avoid applying

to this high impedance voltage circuit any voltage higher than the maximum rated voltages. It is

recommended for proper operation that VIN and VOUT be constrained to the range:

VSS ≤(VIN or VOUT) ≤VDD

To enhance reliability of operation, it is recommended to connect unused inputs to an appropriate

logic voltage level such as VSS or VDD. All the voltages in the following table, are referenced to VSS.

17.1

Absolute Maximum Ratings

17.2

Power Considerations

The average chip-junction temperature, TJ, in degrees Celsius, may be calculated using the

following equation:

TJ = TA + (PD x θJA) (1)

Where:

● TA is the Ambient Temperature in ° C,

●

θJA is the Package Junction-to-Ambient Thermal Resistance, in ° C/W,

● PD is the sum of PINT and PI/O,

● PINT is the product of IDD and VDD, expressed in Watts. This is the Chip Internal Power

● PI/O represents the Power Dissipation on Input and Output Pins; User Determined.

Table 32: Absolute Maximum Ratings

Symbol

Ratings

Value

Unit

VDD

Recommended Supply Voltage

-0.3 to +6.0

VIN

Input Voltage

VSS -0.3 to VDD + 0.3

VAIN

Analog Input Voltage (A/D Converter)

VSS -0.3 to VDD + 0.3

VOUT

Output Voltage

VSS -0.3 to VDD + 0.3

IIN

Input Current

-10 to +10

IOUT

Output Current

-10 to +10

IINJ

Accumulated injected current of all I/O pins (VDD, VSS)40

Operating Temperature Range

0 to +70

°C

TSTG

Storage Temperature Range

-65 to +150

°C

Junction Temperature

150

°C

Power Dissipation

TBD

ESD

ESD susceptibility

2000

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