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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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H8/3021 Datasheet(PDF) 301 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 301 Page - Renesas Technology Corp |
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301 / 712 page  8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 277 of 684 REJ09B0352-0200 Contention between Counter Clearing by Input Capture and Counter Increment: If an input capture signal and counter increment signal occur simultaneously, the counter is cleared according to the input capture signal. The counter is not incremented by the increment signal. The value before the counter is cleared is transferred to the general register. See figure 8.67. φ Input capture signal Counter clear signal TCNT input clock TCNT GR N N H'0000 Figure 8.67 Contention between Counter Clearing by Input Capture and Counter Increment |
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