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H8/3021 Datasheet(PDF) 303 Page - Renesas Technology Corp

No. de pieza H8/3021
Descripción Electrónicos  16-Bit Single-Chip Microcomputer
PDF  712 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
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H8/3021 Datasheet(HTML) 303 Page - Renesas Technology Corp

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8. 16-Bit Integrated Timer Unit (ITU)
Rev.2.00 Mar. 22, 2007 Page 279 of 684
REJ09B0352-0200
Contention between Buffer Register Write and Input Capture: If a buffer register is used for
input capture buffering and an input capture signal occurs in the T
3 state of a write cycle, input
capture takes priority and the write to the buffer register is not performed. See figure 8.69.
φ
Address
Internal write signal
Input capture signal
GR
BR
BR address
Buffer register write cycle
T1
T2
T3
NX
MN
TCNT value
Figure 8.69 Contention between Buffer Register Write and Input Capture



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