 |
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
|
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
SLES025A Datasheet(PDF) 91 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
SLES025A Datasheet(HTML) 91 Page - Texas Instruments |
|
|
91 / 114 page  A–23 A.5.2.5 DMA Current Buffer Content Register (High Byte) (DMABCNT1H – Address FFF4h) (DMABCNT0H – Address FFECh) Bit 7 6 5 4 3 2 1 0 Mnemonic Size 15 Size 14 Size 13 Size 12 Size 11 Size 10 Size 9 Size 8 Type R R R R R R R R Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:0 Size(15:8) Buffer content This register shows the buffer content (bytes) for an ISO OUT endpoint. This register is updated every SOF and is stable for the following USB frame, during which the MCU can read it to implement USB audio synchronization. A.5.2.6 DMA Bulk Packet Count Register (Low Byte) (DMABPCT0 – Address FFF2h) Bit 7 6 5 4 3 2 1 0 Mnemonic PCNT7 PCNT6 PCNT5 PCNT4 PCNT3 PCNT2 PCNT1 PCNT0 Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:0 PCNT (7:0) Bulk packet count This register shows the number of BULK OUT packets DMA has to handle in handshake mode. MCU writes to this register before enabling the DMA to program the DMA to handle up to 64K BULK packets without MCU intervention. MCU can read this register anytime. A.5.2.7 DMA Bulk Packet Count Register (High-byte) (DMABPCT1 – Address FFF1h) Bit 7 6 5 4 3 2 1 0 Mnemonic PCNT15 PCNT14 PCNT13 PCNT12 PCNT11 PCNT10 PCNT9 PCNT8 Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:0 PCNT (15:8) Bulk packet count This register shows the number of BULK OUT packets DMA has to handle in handshake mode. MCU writes to this register before enabling the DMA to program the DMA to handle up to 64K BULK packets without MCU intervention. MCU can read this register anytime. A.5.2.8 UBM Write Pointer (Low Byte) (Ch0WrPtrL – Address FFBCh) (Ch1WrPtrL – Address FFB8h) Bit 7 6 5 4 3 2 1 0 Mnemonic WRPTR7 WRPTR6 WRPTR5 WRPTR4 WRPTR3 WRPTR2 WRPTR1 WRPTR0 Type R R R R R R R R Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:0 WRPTR(7:0) UBM write pointer This register contains 8 LSB bits of 11-bit UBM write pointer of the isochronous OUT endpoint buffer. MCU can read this register anytime. This 11-bit UBM write pointer WRPTR can be used in conjunction with the corresponding 11-bit CHn DMA RDPTR to estimate the amount of data in the isochronous OUT endpoint buffer. |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Mexican ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
