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STM32W108CB Datasheet(PDF) 92 Page - STMicroelectronics |
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STM32W108CB Datasheet(HTML) 92 Page - STMicroelectronics |
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92 / 179 page  General-purpose timers STM32W108CB, STM32W108HB 92/179 Doc ID 16252 Rev 2 Figure 26 gives an overview of one capture/compare channel. The input stage samples the corresponding TIy input to generate a filtered signal (TIyF). Then an edge detector with polarity selection generates a signal (TIyFPy) which can be used either as trigger input by the slave mode controller or as the capture command. It is prescaled before the capture register (ICyPS). Figure 26. Capture/compare channel (example: channel 1 input stage) The output stage generates an intermediate reference signal, OCyREF, which is only used internally. OCyREF is always active high, but it may be inverted to create the output signal, OCy, that controls a GPIO output. Figure 27. Capture/compare channel 1 main circuit |
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