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MPC5123 Datasheet(PDF) 67 Page - Freescale Semiconductor, Inc |
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MPC5123 Datasheet(HTML) 67 Page - Freescale Semiconductor, Inc |
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67 / 86 page ![]() Electrical and Thermal Characteristics MPC5121E/MPC5123 Data Sheet, Rev. 4 Freescale Semiconductor 67 Figure 47. Timing Diagram – 8,16, 24, and 32-bit CODEC/I2S Slave Mode 3.3.20.2 AC97 Mode NOTE Output timing is specified at a nominal 50 pF load. Table 43. Timing Specifications – AC97 Mode Sym Description Min Typ Max Units SpecID 1 Bit Clock cycle time — 81.4 — ns A20.15 2 Clock pulse high time — 40.7 — ns A20.16 3 Clock pulse low time — 40.7 — ns A20.17 4 FrameSync valid after rising clock edge — — 13.0 ns A20.18 5 Output Data valid after rising clock edge — — 14.0 ns A20.19 6 Input Data setup time 1.0 — — ns A20.20 7 Input Data hold time 1.0 — — ns A20.21 BitClk Input 3 (CLKPOL=0) BitClk Input (CLKPOL=1) FrameSync Input (SyncPol = 1) TxD Output 4 5 FrameSync Input (SyncPol = 0) RxD Input 1 2 2 6 |
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