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BU9794KV Datasheet(PDF) 6 Page - Rohm |
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BU9794KV Datasheet(HTML) 6 Page - Rohm |
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6 / 23 page ![]() 6/22 0000000 a b c d e f g h i j k l m n o p … Display Data transfer Command ●Function description (BU9794KV) ○SPI (3wire Serial Interface) This device is controlled by 3-wire signal (CSB, SCL, and SD). First, Interface counter is initialized with CSB=“H", and CSB=”L” makes SD and SCL input enable. The protocol of 3-SPI transfer is as follows. Each command starts with Command or Data judgment bit (D/C) as MSB data, and continuously in order of D6 – D0 are followed after CSB =”L”. (Internal data is latched at the rising edge of SCL, it converted to 8bits parallel data at the rising edge of 8th CLK.) D/C = “H” : Command D/C = “L” : Data Fig. BU9794KV-4 3-SPI Command/Data Transfer format ○ Write display data and transfer method This device has Display Data RAM (DDRAM) of 50×4=200bit. The relationship between data input and display data, DDRAM data and address are as follows; 8 bit data will be stored in DDRAM. The address to be written is specified by Address set command, and the address is automatically incremented in every 4bit data. Data can be continuously written in DDRAM by transmitting Data continuously. (When RAM data is written successively after writing RAM data to 31h (SEG49), the address is returned to 00h (SEG0) by the auto-increment function DDRAM address 00 01 02 03 04 05 06 07 ・・・ 2Fh 30h 31h BIT 0 a e i m COM0 1 b f j n COM1 2 c g k o COM2 3 d h l p COM3 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG47 SEG48 SEG49 As data transfer to DDRAM is done every 4bit data, it will be cancelled if it changes CSB=”L”→”H” before 4bits data transfer. ○ Reset initialize condition Initial condition after execute Software Reset is as follows. ・ Display is OFF. ・ DDRAM address is initialized (DDRAM Data is not initialized). ・ Refer to Command Description about initialize value of register. Command Command/Data D5 SCL CSB SD D2 D1 D0 D7 D/C D6D5D4D3D2D1D0 D/C D1 D0 D7 D6 D6 D5 D4 D3 D6 D5 D4 D3 D2 |
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