HCS12 datasheet(56/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

accumulate operations, table interpolation, and specialized fuzzy logic

operations that involve mathematical calculations.

Refer to Section 6. Instruction Glossary for detailed information about

individual instructions. Appendix A. Instruction Reference contains

quick-reference material, including an opcode map and postbyte encoding

for indexed addressing, transfer/exchange instructions, and loop primitive

instructions.

5.3 Load and Store Instructions

Load instructions copy memory content into an accumulator or register.

Memory content is not changed by the operation. Load instructions (but not

LEA_ instructions) affect condition code bits so no separate test instructions

are needed to check the loaded values for negative or 0 conditions.

Store instructions copy the content of a CPU register to memory.

instructions automatically update the N and Z condition code bits, which can

eliminate the need for a separate test instruction in some programs.

Table 5-1 is a summary of load and store instructions.

Table 5-1. Load and Store Instructions

Mnemonic

Function

Operation

Load Instructions

LDAA

Load A

(M)

⇒ A

LDAB

Load B

(M)

⇒ B

LDD

Load D

: M + 1) ⇒ (A:B)

LDS

Load SP

: M + 1) ⇒ SPH:SPL

LDX

Load index register X

: M + 1) ⇒ XH:XL

LDY

Load index register Y

: M + 1) ⇒ YH:YL

LEAS

Load effective address into SP

Effective address

⇒ SP

LEAX

Load effective address into X

Effective address

⇒ X

LEAY

Load effective address into Y

Effective address

⇒ Y

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